We have talked with CIX and they do not support overclocking due to potential damage to the hardware.
Orion O6 Debug Party Invitation
Usually no vendor supports overclocking, but given that the chip is currently configured to run a lower than advertised frequency, it’s reasonable to ask what should be the expected stable voltage for the original frequencies, and make sure what the limit not to cross is. They would definitely benefit from customers testing this. Look at RPi for example, whose stock frequencies have been increasing based on customer feedback. Here it would be perfectly possible that after 6 months they decide that 3 GHz is perfectly stable, and that becomes a nice marketing argument for them: first armv9-base SBC and first SoC running at 3 GHz stock.
Also it would be nice to know what causes the medium cores to have a lower limit than the other ones. Are they using a slightly different design which limits their frequency, is it a matter of power distribution on chip (e.g. cores located around the die have more power than those at the center), or is it purely arbitrary in order to limit the total capacity. Indeed, maybe some users would prefer to set all 8 cores at the same intermediary frequency and maintain a moderate wattage this way (e.g. 8x2.6 instead of 4x2.8 + 4x2.4, which would deliver the same total perf at less watts).
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Also it would be nice to know what causes the medium cores to have a lower limit than the other ones.
Most likely it makes validation easier since more slow cores = less defective cores. This is also likely why it takes more voltage
The original frequency is the design frequency, which once they taped it out, they realized that they could not reach it on all chips. The currently provided frequency is THE official stable frequency, and running above it is considered as overclocking. This is not to say that it can’t be changed in the future (we already see the memory speed increase), but for now, nobody knows where is the real limit.
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Well, I’m sorry, but 2.5+2.6 and 2.2+2.3 are clearly not the advertised 2.8+2.4, so for me “overclocking” is running beyond 2.8+2.4. I understand limitations caused by manufacturing defects of early batches but in this case it would be wiser to let the customers configure both the DRAM and the CPU frequencies in the BIOS (like is done in the PC world), pre-set them to safe values and tell them “above is at your own risk”. Many of us would happily run at whatever is stable for us and not just according the the maker’s specs targetting harsher operating conditions.
You guys need to keep in mind that the only reason customers are willing to invest quite some money in this board is to get real performance because that is their metric for this product. It’s not a rock5b that someone uses as their small NAS or video player. They’re ordering this machine as a development machine because it advertises performance getting close to the x86 world but with an Arm chip. If customers just want an ITX board they buy an x86. Here they’re specifically targetting Arm and performance. Thus you can be sure that for a lot of them, while stability is super important, performance will also be and many will want to run at (or even beyond) advertised specs as long as it works for them.
You’ll also note that nobody complained about the power draw under load. There are complaints in idle because the machine is supposed to stay up all time and not to make noise close to where the developers operate, but if it draws 30W at full load, that’s OK because it will not be all the time.
And the real benefit of this is for both Radxa and CIX: do you know who posts performance numbers? Precisely those interested with this and who are proud to break new records, thus a lot of the great publicity for your board and that chip will actually be made by users running above specs and comparing them with competition.
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Yeah, it’s understandable that they don’t support OC. I was just wondering about the specs for the core supplies, which should be found in the SoC datasheet.
Like Willy pointed out, how far would I be from the absolute max. rating if I set a rail to 1.1 V?
For instance, RK3588 is rated up to 1.1 V for the core supplies IIRC.
This information is not available on the datasheet. There is no electrical rating at all.
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Yeah. Yuntian, just to be clear, we’re not trying to be OC jerks doing whatever nor cooling with LNO2 and pushing limits, we’re just trying to gauge if it looks reasonable to reach the advertised performance level, if there’s some margin, while staying stable, and being careful not to fry our devices out of ignorance.
Another point, in the code there are some maximum power levels per cluster declared. I don’t know if they’re used as a thumb rule (e.g. a function of frequency and voltage) or if there’s a way to measure that, but combined with the abs ratings it could be very helpful to make sure we’re staying within expected physical limits.
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That only works if they’re not differentiated, i.e. they’re initially all the same, and the 4 slowest ones are elected as med-cores and the 4 fastest ones are elected as big-cores. But given that they’re arranged in clusters, I strongly doubt there’s any such flexibility. IMHO it more depends on their location on the chip. But your point would make a lot of sense to optimize the yield, indeed!
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Wait a second, are you saying that the advertised clock speeds are not going to be achieved? And you’re still advertising unachievable clocks on the website?
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Indeed, maybe some users would prefer to set all 8 cores at the same intermediary frequency and maintain a moderate wattage this way (e.g. 8x2.6 instead of 4x2.8 + 4x2.4, which would deliver the same total perf at less watts).
The medium cores may be (/probably are) different in more than just frequency. It would be nice to get some official statement from Radxa on exactly what the differences are.
Otherwise I agree that it would be better to only have two sets of cores versus three.
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Can someone from Radxa provide a list of things present on product page which are still true?
You are not open source, not first arm v9, not 100MB/s memory bandwidth, lower clocks than advertised.
What else I missed?
Thats almost Ryzen 7 3700X level, its not too bad. But still below in ST compared to a 5600G.
not first arm v9
Can you name other armv9 devices that you can get schematic and/or build edk2 and kernel?
The dram is capable of running at 6400MT/s, why not 100GB/s?
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This is simply unacceptable. I excused the original clocks as maybe a beta firmware. But if up to 2.8ghz is literally unreachable inside spec then its well past your time to modify the product page and store listings, issue an apology, and attempt to make that right in any way.
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When firmware and kernel support are done right I do not need schematics to run system.
When it comes to EDK2: as above.
When it comes to kernel: I already built kernels which work on NVidia Grace or Graviton 4. They are Armv9 systems, existed before you announced that beta program. Your board is capable of running mainline kernel. I would not even run your 6.1.44 kernel as I do not use SBC vendor kernels.
DRAM speed capped to 4266 MT/s on O6? thread shows that SoC is unable to make use of that bandwidth.
And “dram is capable so why not” is bullshit. I had a device with 400MHz SoC which had DDR2 chips capable of running at 800MHz. And was used at less than half of memory bandwidth.
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Are you serious? I was willing to look past the source code delay and the DRAMa, but advertising a clock speed that you KNOW is incorrect is on another level
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Well, I wouldn’t necessarily be so eager as you to sling around legal terms. I doubt Radxa expected the P1 to not reach the advertised frequency. But still, continuing to advertise it as such is really reprehensible…
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