thanks for the link, it seems like even 3A is almost as fast as Pi 4B, so perhaps it is time for me to sell it (just don’t wanna waste it) and consider a 3A as replacement, and perhaps overclock it a bit to match Pi 4B;
and 5B is like 3x of Pi 4B… on that “server workload in general”. I think it is still useful, as it should tell the integer ALU performance and likely branching performance as well. for GPU, VPU, NPU and else, they depend on the maturity of drivers, so I won’t be considering them for the time being.
Thanks. I’m probably not an average Arm SBC user.
I’m a developer for Altair Accelerator, and we have some limited support in our product for Armv8. Whatever customers are using that are probably doing so on Arm server systems, maybe even proprietary ones that aren’t available to the generic public.
But because we do support the platform, I’m interested in tinkering at home on an Arm system, but more as a C/C++/Python development box rather than a Desktop, NAS, or a game emulation platform. Sure, I have access to some Arm hosts in the cloud, but they’re slow and inconvenient for me to use, and I don’t want to ask for $$ to spin up an AWS instance just so that I can play. The Honeycomb LX2, NVidia Jetson SBC, or rk3588 are probably closest to what I’m looking for, but there’s a lot in the NVidia hardware that I probably wouldn’t ever make use of. For me, it would be a host I put on my LAN and ssh into.
Presume it just tweaks the timings so everything is optimum, dunno PVTM is new to me but been wondering if the OPP table does anything or really its like the amlogic where everything seems hardcoded in the MCU blob.
Have you tried DTC and editing the OPP table either under or overclock and see if its totally ignored?
Preferably OC to see if it does?
Hi @NGBRO, this is what I did with my R0. Thinking I’ll do something similar with the 5B, likely adding an inlet and outlet for the fan until something I like becomes available to purchase or 3D print
The cpufreq driver decides to hide 2256, 2304 and 2352 from the OPP table (which might be a reasonable choice since the 200 MHz step between 2208-2400 is ok) but in @willy’s case cpu4-5 get 2304 MHz as highest OPP and cpu6-7 get 2352 MHz. The driver hides the 2400 OPP regardless what the MCU inside the SoC decides to use as real clockspeeds for each cpufreq OPP.
And you should be aware that Amlogic’s clockspeed cheating stopped with most recent SoCs. The last ones where we observed a hardcoded difference between cpufreq OPP and real clockspeeds was GXL/GXM (S905X and S912 where cpufreq OPP says 1.5 GHz while in reality it’s 1.4 GHz)
Allen 8nm is just the minimum resolution of lithographic process on the silicon wafer and how dense the resultant SoC can be (in rough terms).
None of us understand that process as its massively valuable IP, but we don’t need to understand manufacture process just operation of the SoC and as @tkaiser posted we already have some absolutely whopping sized technical references datasheets for the RK3588.
@tkaiser as a test if you OC the OPP does the soc take any notice at all would still be interesting.
The amlogic was not a cheat as likely 10% is likely within tolerance of quoted specs what they where doing is locking the speed with a licensed blob.
The quoted specs was just the standard sales speak as many things are cheats where ever they can legally and presume it was.
The GPU on the S905Y2 seemed to be locked whilst on the a311d clockspeed is locked via a mcu blob.
I guess its the prerogative of the SoC manufacture and wondering even though we can not test GPU does the CPU OC?
I completely accept the things,
I will certainly compared to others have the most recreational and non-critical use of this SOC.
Frankly I’m waiting a RK3588 Pico/nano ITX fonctionnal board with full width heatsink and sell it including postage to me at a low price, and it’s all good !
I do use KVM on my Ubuntu 20 Linux desktop running a Ryzen 9 5950 with 64GB RAM, and I’ve even managed to set up an Arm (aarch64) VM via Qemu as well, but a) It was VERY difficult to get working and b) It feels slow.
It also wouldn’t be my first Arm SBC. I have a RPi 3B+ running Raspbian. It’s a DNS for my local LAN and it drives my old Epson flatbed scanner, which no longer has Windows support.
There is no ‘8nm process’ since these numbers today are just marketing BS. At least according to TSMC’s vice president of corporate research (TSMC is the foundry having the most advanced process nodes today so maybe he knows a little bit what he’s talking about):
Yeah, but I was talking about running an arm64 Linux distribution in a VM on one of these cores which is really easy and super fast since both cores and OS support virtualization. But running macOS isn’t everybody’s 1st choice so nevermind
are they though?
so then what happen when and if they get to 2 or even 1nm process?
you know there is a thing called quantum tunneling , are you saying that is not real either?
or are you saying that they are just hyping and that they are not really using the processes they are claiming?
from my understanding they are getting dangerously close to Moore’s law hitting the wall , and that they can only go to 3 or 2 nm before quantum tunneling become an issue,
then the only thing to do is use layering techniques to increase performance
They are not because of quantum tunnelling because we are at such small quantum size the electrons pass through without registering.
When they say 8nm they are the smallest lithographic process avail will be 8nm but much will be bigger process so really its not, but capable of 8nm or less if it wasn’t for quantum tunnelling where there is so little stuff there the electron just passes straight through.
Its all stuff we don’t need to know for use and far too complex but we are already past much of what can be done with conventual silicon and where they can mitigate some of it is at that process spec but more and more isn’t.
I was reading about it a month ago and about special gate keeper circuits to help mitigate quantum tunnelling and as per usual have forgot most of what I read.
But hey, that’s just TSMC’s vice president of corporate research! I guess we should better trust marketing departments, tech magazines, bloggers and the whole of YouTube telling us about ‘nm processes’ when they in reality just report about a fab’s node name that has some specific number in its name that gets lower and lower every year which poses the problem which numbers the marketing departments will choose in a few years since they’re obviously getting close to 1 with their node names within the next time.
Since 2009, however, “node” has become a commercial name for marketing purposes[6] that indicates new generations of process technologies, without any relation to gate length, metal pitch or gate pitch.[7][8][9] TSMC and Samsung’s 10 nm (10 LPE) processes are somewhere between Intel’s 14 nm and 10 nm processes in transistor density.
There is practically one firm who has a near monopoly on the lithographic machines that do the etching.
I think its them who conjure up new node process names.
That monopoly might also cause a new silicon shortage as apparently the US has banned them from supplying new node technology and existing to China as TSMC is based in Taiwan
Its sort of approx effective density in die size and efficiency and could be wrong about AMSL but it always seems to be co-ordinated even though the transistor technology might be different so always presumed it was.
