Zero eMMC USB Boot Issue

#1

Got my Zero, immediately went to try and enter maskrom mode because I didn’t want to use the Android pre-installed on the eMMC. Hold USB Boot button down as shown on wiki, but can never get Zadig to recognize the GX Chip, realized with device manager I wasn’t even recognizing a USB device, so I figured there was an issue. Saw that next step was getting a USB to TTL cable to hook up to the debug console. Few days to get that and set it up, now I’m able to see that when I power the Zero up it seems to start booting the android install from the eMMC, but when I hold the USB Boot button down and power it up I get this in my debug instead:

G12A:BL:0253b8:61aa2d;FEAT:E0F83180:2000;POC:D;RCY:0;USB:0;EMMC:0;READ:0;0.0
bl2_stage_init 0x01
bl2_stage_init 0x81
hw id: 0x0001 - pwm id 0x00
bl2_stage_init 0xc0
bl2_stage_init 0x02
L0:00000000
L1:00000703
L2:00008067
L3:04000000
S1:00000000
B2:00002000
B1:e0f83180
TE: 918458
BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
Board ID = 2
Set cpu clk to 24M
Set clk81 to 24M
CPU clk: 1200 MHz
Set clk81 to 166.6M
eMMC boot @ 0
sd/emmc cmd 17 arg 0x00000001 status 01df00df
sw8 f
DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
board id: 2
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 0
sd/emmc cmd 17 arg 0x00000081 status 01de000f
sdio read data fail
FIP HDR CHK: 0x00000065 ADDR 0xfffd0000
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 1
sd/emmc cmd 8 arg 0x00000000 status 01de000f
00000001
emmc swith 1 part fail
FIP HDR CHK: 0x00000065 ADDR 0xfffd0000
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 2
sd/emmc cmd 8 arg 0x00000000 status 01de000f
00000001
emmc swith 2 part fail
FIP HDR CHK: 0x00000065 ADDR 0xfffd0000
reset…

Any ideas for fixing from my end, or is this indicative of a hardware issue?

1 Like
#2

Make sure you really held that button. When done correctly you should only see one line similar to this in serial:

G12A:BL:0253b8:61aa2d;FEAT:E0F83180:2000;POC:D;RCY:0;USB:0;EMMC:0;READ:0;0.0
#3

I’m very confident I held the button down, I could feel it depress when I was doing this, and I tried it multiple times to ensure the problem was repeatable. When I was sure I held the button down, I got the debug I posted above, and as long as I held the button down it would print to the “reset…” line, wait a few seconds, then start again at G12A… repeating the section I posted until I release the button. As soon as the button is released, the repeating in the debug stops (why I’m confident I was holding it as it did this multiple times), and it starts loading android from the eMMC.

#4

Not sure if you are still investigating this, but I set this up again just to be sure I was pressing the button. Same behavior observed as before. Any suggestions would be helpful.

#5

Maybe the button is broken on your board. Can you try shorting the two ends of the button and booting again?

#6

Well, if the button wasn’t broken before, it is now. It’s pretty small, so I’m shorting it with tweezers, and I kind of ripped the button off. I have a second zero that didn’t have an eMMC, so I was able to transfer that button over to the board with the eMMC, and got the same result as before. Now I have removed the button completely (again not on purpose), and I’m getting it to short, but it still won’t go into maskrom and the debug looks pretty strange. I can’t attach the debug, and I’m not going through and formatting it again, but here is the debug output when I was able to short it with android loading just after I release the short:

G12A:BL:0253b8:61aa2d;FEAT:E0F83180:2000;POC:D;RCY:0;USB:0;EMMC:0;READ:0;0.0
                                                                            l2_stage_init 0x01
bl2_stage_init 0x81
hw id: 0x0001 - pwm id 0x00
bl2_stage_init 0xc0
bl2_stage_init 0x02

L0:00000000
L1:00000703
L2:00008067
L3:04000000
S1:00000000
B2:00002000
B1:e0f83180

TE: 927167

BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz

Board ID = 2
Set cpu clk to 24M
Set clk81 to 24M
CPU clk: 1200 MHz
Set clk81 to 166.6M
eMMC boot @ 0
sd/emmc cmd 17 arg 0x00000001 status 01df00df
sw8 f
DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
board id: 2
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 0
sd/emmc cmd 17 arg 0x00000081 status 01de000f
sdio read data fail
FIP HDR CHK: 0xfffffff2 ADDR 0xfffd0000
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 1
sd/emmc cmd 8 arg 0x00000000 status 01de000f
00000001
emmc swith 1 part fail
FIP HDR CHK: 0xfffffff2 ADDR 0xfffd0000
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 2
sd/emmc cmd 8 arg 0x00000000 status 01de000f
00000001
emmc swith 2 part fail
FIP HDR CHK: 0xfffffff2 ADDR 0xfffd0000
reset...
G12A:BL:0253b8:61aa2d;FEAT:E0F83180:2000;POC:D;RCY:0;USB:0;EMMC:0;READ:0;0.0
                                                                            l2_stage_init 0x01
bl2_stage_init 0x81
hw id:▒G12A:BL:0253b8:61aa2d;FEAT:E0F83180:2000;POC:D;RCY:0;USB:0;EMMC:0;READ:0;0.0
                                                                                   l2_stage_init 0x01
bl2_stage_init 0x81
hw id:▒G12A:BL:0253b8:61aa2d;FEAT:E0F83180:2000;POC:D;RCY:0;USB:0;EMMC:0;READ:0;0.0
                                                                                   l2_stage_init 0x01
bl2_stage_init 0x81
hw id:▒G12A:BL:0253b8:61aa2d;FEAT:E0F83180:2000;POC:D;RCY:0;USB:0;EMMC:0;READ:0;0.0
                                                                                   bl2_stage_init 0x01
bl2_stage_init 0x81
hw id:▒G12A:BL:0253b8:61aa2d;FEAT:E0F83180:2000;POC:D;RCY:0;USB:0;EMMC:0;READ:0;0.0?
                                                                                    bl2_stage_init 0x01
bl2_stage_init 0x81
hw id: 0x0001 - pwm id 0x00
bl2_stage_init 0xc0
bl2_stage_init 0x02

L0:00000000
L1:00000703
L2:00008067
L3:04000000
S1:00000000
B2:00002000
B1:e0f83180

TE: 927168

BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz

Board ID = 2
Set cpu clk to 24M
Set clk81 to 24M
CPU clk: 1200 MHz
Set clk81 to 166.6M
eMMC boot @ 0
sd/emmc cmd 17 arg 0x00000001 status 01df00df
sw8 f
DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
board id: 2
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 0
sd/emmc cmd 17 arg 0x00000081 status 01de000f
sdio read data fail
FIP HDR CHK: 0xfffffff2 ADDR 0xfffd0000
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 1
sd/emmc cmd 8 arg 0x00000000 status 01de000f
00000001
emmc swith 1 part fail
FIP HDR CHK: 0xfffffff2 ADDR 0xfffd0000
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 2
sd/emmc cmd 8 arg 0x00000000 status 01de000f
00000001
emmc swith 2 part fail
FIP HDR CHK: 0xfffffff2 ADDR 0xfffd0000
reset...
G12A:BL:0253b8:61aa2d;FEAT:E0F83180:2000;POC:D;RCY:0;USB:0;EMMC:0;READ:0;0.0
                                                                            l2_stage_init 0x01
bl2_stage_init 0x81
hw id: 0x0001 - pwm id 0x00
bl2_stage_init 0xc0
bl2_stage_init 0x02

L0:00000000
L1:00000703
L2:00008067
L3:04000000
S1:00000000
B2:00002000
B1:e0f83180

TE: 927168

BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz

Board ID = 2
Set cpu clk to 24M
Set clk81 to 24M
CPU clk: 1200 MHz
Set clk81 to 166.6M
eMMC boot @ 0
sw8 f
DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
board id: 2
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 0
sd/emmc cmd 17 arg 0x00000081 status 01de000f
sdio read data fail
FIP HDR CHK: 0xfffffff2 ADDR 0xfffd0000
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 1
sd/emmc cmd 8 arg 0x00000000 status 01de000f
00000001
emmc swith 1 part fail
FIP HDR CHK: 0xfffffff2 ADDR 0xfffd0000
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 2
sd/emmc cmd 8 arg 0x00000000 status 01de000f
00000001
emmc swith 2 part fail
FIP HDR CHK: 0xfffffff2 ADDR 0xfffd0000
reset...
G12A:BL:0253b8:61aa2d;FEAT:E0F83180:2000;POC:D;RCY:0;USB:0;EMMC:0;READ:0;0.0
                                                                            l2_stage_init 0x01
bl2_stage_init 0x81
hw id: 0x0001 - pwm id 0x00
bl2_stage_init 0xc0
bl2_stage_init 0x02

L0:00000000
L1:00000703
L2:00008067
L3:04000000
S1:00000000
B2:00002000
B1:e0f83180

TE: 927159

BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz

Board ID = 2
Set cpu clk to 24M
Set clk81 to 24M
CPU clk: 1200 MHz
Set clk81 to 166.6M
eMMC boot @ 0
sw8 f
DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
board id: 2
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 0
sd/emmc cmd 17 arg 0x00000081 status 01de000f
sdio read data fail
FIP HDR CHK: 0xfffffff2 ADDR 0xfffd0000
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 1
sd/emmc cmd 8 arg 0x00000000 status 01de000f
00000001
emmc swith 1 part fail
FIP HDR CHK: 0xfffffff2 ADDR 0xfffd0000
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 2
sd/emmc cmd 8 arg 0x00000000 status 01de000f
00000001
emmc swith 2 part fail
FIP HDR CHK: 0xfffffff2 ADDR 0xfffd0000
reset...
G12A:BL:0253b8:61aa2d;FEAT:E0F83180:2000;POC:D;RCY:0;USB:0;EMMC:0;READ:0;0.0
                                                                            bl2_stage_init 0x01
bl2_stage_init 0x81
hw id: 0x0001 - pwm id 0x00
bl2_stage_init 0xc0
bl2_stage_init 0x02

L0:00000000
L1:00000703
L2:00008067
L3:04000000
S1:00000000
B2:00002000
B1:e0f83180

TE: 927159

BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz

Board ID = 2
Set cpu clk to 24M
Set clk81 to 24M
CPU clk: 1200 MHz
Set clk81 to 166.6M
eMMC boot @ 0
sw8 f
DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
board id: 2
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 0
sd/emmc cmd 17 arg 0x00000081 status 01de000f
sdio read data fail
FIP HDR CHK: 0xfffffff2 ADDR 0xfffd0000
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 1
sd/emmc cmd 8 arg 0x00000000 status 01de000f
00000001
emmc swith 1 part fail
FIP HDR CHK: 0xfffffff2 ADDR 0xfffd0000
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 2
sd/emmc cmd 8 arg 0x00000000 status 01de000f
00000001
emmc swith 2 part fail
FIP HDR CHK: 0xfffffff2 ADDR 0xfffd0000
reset...
G12A:BL:0253b8:61aa2d;FEAT:E0F83180:2000;POC:D;RCY:0;USB:0;EMMC:0;READ:0;0.0
                                                                            l2_stage_init 0x01
bl2_stage_init 0x81
hw id: 0x0001 - pwm id 0x00
bl2_stage_init 0xc0
bl2_stage_init 0x02

L0:00000000
L1:00000703
L2:00008067
L3:04000000
S1:00000000
B2:00002000
B1:e0f83180

TE: 927168

BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz

Board ID = 2
Set cpu clk to 24M
Set clk81 to 24M
CPU clk: 1200 MHz
Set clk81 to 166.6M
eMMC boot @ 0
sw8 f
DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
board id: 2
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 0
sd/emmc cmd 17 arg 0x00000081 status 01de000f
sdio read data fail
FIP HDR CHK: 0xfffffff2 ADDR 0xfffd0000
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 1
sd/emmc cmd 8 arg 0x00000000 status 01de000f
00000001
emmc swith 1 part fail
FIP HDR CHK: 0xfffffff2 ADDR 0xfffd0000
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 2
sd/emmc cmd 8 arg 0x00000000 status 01de000f
00000001
emmc swith 2 part fail
FIP HDR CHK: 0xfffffff2 ADDR 0xfffd0000
reset...
G12A:BL:0253b8:61aa2d;FEAT:E0F83180:2000;POC:D;RCY:0;USB:0;EMMC:0;READ:0;0.0
                                                                            bl2_stage_init 0x01
bl2_stage_init 0x81
hw id: 0x0001 - pwm id 0x00
bl2_stage_init 0xc0
bl2_stage_init 0x02

L0:00000000
L1:00000703
L2:00008067
L3:04000000
S1:00000000
B2:00002000
B1:e0f83180

TE: 927159

BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz

Board ID = 2
Set cpu clk to 24M
Set clk81 to 24M
CPU clk: 1200 MHz
Set clk81 to 166.6M
eMMC boot @ 0
sw8 f
DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
board id: 2
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 0
sd/emmc cmd 17 arg 0x00000081 status 01de000f
sdio read data fail
FIP HDR CHK: 0xfffffff2 ADDR 0xfffd0000
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 1
sd/emmc cmd 8 arg 0x00000000 status 01de000f
00000001
emmc swith 1 part fail
FIP HDR CHK: 0xfffffff2 ADDR 0xfffd0000
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 2
sd/emmc cmd 8 arg 0x00000000 status 01de000f
00000001
emmc swith 2 part fail
FIP HDR CHK: 0xfffffff2 ADDR 0xfffd0000
reset...
G12A:BL:0253b8:61aa2d;FEAT:E0F83180:2000;POC:D;RCY:0;USB:0;EMMC:0;READ:0;0.0
                                                                            l2_stage_init 0x01
bl2_stage_init 0x81
hw id: 0x0001 - pwm id 0x00
bl2_stage_init 0xc0
bl2_stage_init 0x02

L0:00000000
L1:00000703
L2:00008067
L3:04000000
S1:00000000
B2:00002000
B1:e0f83180

TE: 927159

BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz

Board ID = 2
Set cpu clk to 24M
Set clk81 to 24M
CPU clk: 1200 MHz
Set clk81 to 166.6M
eMMC boot @ 0
sd/emmc cmd 17 arg 0x00000001 status 01df00df
sw8 f
DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
board id: 2
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 0
sd/emmc cmd 17 arg 0x00000081 status 01de000f
sdio read data fail
FIP HDR CHK: 0xfffffff2 ADDR 0xfffd0000
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 1
sd/emmc cmd 8 arg 0x00000000 status 01de000f
00000001
emmc swith 1 part fail
FIP HDR CHK: 0xfffffff2 ADDR 0xfffd0000
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 2
sd/emmc cmd 8 arg 0x00000000 status 01de000f
00000001
emmc swith 2 part fail
FIP HDR CHK: 0xfffffff2 ADDR 0xfffd0000
reset...
G12A:BL:0253b8:61aa2d;FEAT:E0F83180:2000;POC:D;RCY:0;USB:0;EMMC:0;READ:0;0.0
                                                                            l2_stage_init 0x01
bl2_stage_init 0x81
hw id: 0x0001 - pwm id 0x00
bl2_stage_init 0xc0
bl2_stage_init 0x02

L0:00000000
L1:00000703
L2:00008067
L3:04000000
S1:00000000
B2:00002000
B1:e0f83180

TE: 927167

BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz

Board ID = 2
Set cpu clk to 24M
Set clk81 to 24M
CPU clk: 1200 MHz
Set clk81 to 166.6M
eMMC boot @ 0
sd/emmc cmd 17 arg 0x00000001 status 01df00df
sw8 f
DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
board id: 2
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 0
sd/emmc cmd 17 arg 0x00000081 status 01de000f
sdio read data fail
FIP HDR CHK: 0xfffffff2 ADDR 0xfffd0000
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 1
sd/emmc cmd 8 arg 0x00000000 status 01de000f
00000001
emmc swith 1 part fail
FIP HDR CHK: 0xfffffff2 ADDR 0xfffd0000
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 2
sd/emmc cmd 8 arg 0x00000000 status 01de000f
00000001
emmc swith 2 part fail
FIP HDR CHK: 0xfffffff2 ADDR 0xfffd0000
reset...
G12A:BL:0253b8:61aa2d;FEAT:E0F83180:2000;POC:D;RCY:0;USB:0;EMMC:0;READ:0;0.0
                                                                            l2_stage_init 0x01
bl2_stage_init 0x81
hw id: 0x0001 - pwm id 0x00
bl2_stage_init 0xc0
bl2_stage_init 0x02

L0:00000000
L1:00000703
L2:00008067
L3:04000000
S1:00000000
B2:00002000
B1:e0f83180

TE: 927168

BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz

Board ID = 2
Set cpu clk to 24M
Set clk81 to 24M
CPU clk: 1200 MHz
Set clk81 to 166.6M
eMMC boot @ 0
sd/emmc cmd 17 arg 0x00000001 status 01df00df
sw8 f
DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
board id: 2
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 0
sd/emmc cmd 17 arg 0x00000081 status 01de000f
sdio read data fail
FIP HDR CHK: 0xfffffff2 ADDR 0xfffd0000
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 1
sd/emmc cmd 8 arg 0x00000000 status 01de000f
00000001
emmc swith 1 part fail
FIP HDR CHK: 0xfffffff2 ADDR 0xfffd0000
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 2
sd/emmc cmd 8 arg 0x00000000 status 01de000f
00000001
emmc swith 2 part fail
FIP HDR CHK: 0xfffffff2 ADDR 0xfffd0000
reset...
G12A:BL:0253b8:61aa2d;FEAT:E0F83180:2000;POC:D;RCY:0;USB:0;EMMC:0;READ:0;0.0?
                                                                             bl2_stage_init 0x01
bl2_stage_init 0x81
hw id: 0x0001 - pwm id 0x00
bl2_stage_init 0xc0
bl2_stage_init 0x02

L0:00000000
L1:00000703
L2:00008067
L3:04000000
S1:00000000
B2:00002000
B1:e0f83180

TE: 927167

BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz

Board ID = 2
Set cpu clk to 24M
Set clk81 to 24M
CPU clk: 1200 MHz
Set clk81 to 166.6M
eMMC boot @ 0
sd/emmc cmd 17 arg 0x00000001 status 01df00df
sw8 f
DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
board id: 2
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 0
sd/emmc cmd 17 arg 0x00000081 status 01de000f
sdio read data fail
FIP HDR CHK: 0xfffffff2 ADDR 0xfffd0000
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 1
sd/emmc cmd 8 arg 0x00000000 status 01de000f
00000001
emmc swith 1 part fail
FIP HDR CHK: 0xfffffff2 ADDR 0xfffd0000
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 2
sd/emmc cmd 8 arg 0x00000000 status 01de000f
00000001
emmc swith 2 part fail
FIP HDR CHK: 0xfffffff2 ADDR 0xfffd0000
reset...
G12A:BL:0253b8:61aa2d;FEAT:E0F83180:2000;POC:D;RCY:0;USB:0;EMMC:0;READ:0;0.0
                                                                            bl2_stage_init 0x01
bl2_stage_init 0x81
hw id: 0x0001 - pwm id 0x00
bl2_stage_init 0xc0
bl2_stage_init 0x02

L0:00000000
L1:00000703
L2:00008067
L3:04000000
S1:00000000
B2:00002000
B1:e0f83180

TE: 927159

BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz

Board ID = 2
Set cpu clk to 24M
Set clk81 to 24M
CPU clk: 1200 MHz
Set clk81 to 166.6M
eMMC boot @ 0
sw8 f
DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
board id: 2
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 0
sd/emmc cmd 17 arg 0x00000081 status 01de000f
sdio read data fail
FIP HDR CHK: 0xfffffff2 ADDR 0xfffd0000
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 1
sd/emmc cmd 8 arg 0x00000000 status 01fe000f
00000001
emmc swith 1 part fail
FIP HDR CHK: 0xfffffff2 ADDR 0xfffd0000
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 2
sd/emmc cmd 8 arg 0x00000000 status 01fe000f
00000001
emmc swith 2 part fail
FIP HDR CHK: 0xfffffff2 ADDR 0xfffd0000
reset...
G12A:BL:0253b8:61aa2d;FEAT:E0F83180:2000;POC:D;RCY:0;USB:0;EMMC:0;READ:0;0.0
                                                                            l2_stage_init 0x01
bl2_stage_init 0x81
hw id: 0x0001 - pwm id 0x00
bl2_stage_init 0xc0
bl2_stage_init 0x02

L0:00000000
L1:00000703
L2:00008067
L3:04000000
S1:00000000
B2:00002000
B1:e0f83180

TE: 927168

BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz

Board ID = 2
Set cpu clk to 24M
Set clk81 to 24M
CPU clk: 1200 MHz
Set clk81 to 166.6M
eMMC boot @ 0
sw8 s
DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
board id: 2
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 0
fw parse done
Load ddrfw from eMMC, src: 0x00060200, des: 0xfffd0000, size: 0x0000c000, part: 0
Load ddrfw from eMMC, src: 0x00038200, des: 0xfffd0000, size: 0x00004000, part: 0
PIEI prepare done
fastboot data load
00000000
emmc switch 1 ok
ddr saved addr:00016000
Load ddr parameter from eMMC, src: 0x02c00000, des: 0xfffd0000, size: 0x00001000, part: 0
00000000
emmc switch 0 ok
fastboot data verify
verify result: 265
Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
LPDDR4 probe
ddr clk to 792MHz
Load ddrfw from eMMC, src: 0x0003c200, des: 0xfffd0000, size: 0x0000c000, part: 0

dmc_version 0000
Check phy result
INFO : ERROR : Training has failed!
1D training failed
Cfg max: 2, cur: 2. Board id: 255. Force loop cfg
LPDDR4 probe
ddr clk to 792MHz
Load ddrfw from eMMC, src: 0x0003c200, des: 0xfffd0000, size: 0x0000c000, part: 0

dmc_version 0000
Check phy result
INFO : End of CA training
INFO : End of initialization
INFO : Training has run successfully!
Check phy result
INFO : End of initialization
INFO : End of read enable training
INFO : End of fine write leveling
INFO : End of Write leveling coarse delay
INFO : Training has run successfully!
Check phy result
INFO : End of initialization
INFO : End of read dq deskew training
INFO : End of MPR read delay center optimization
INFO : End of write delay center optimization
INFO : End of read delay center optimization
INFO : End of max read latency training
INFO : Training has run successfully!
1D training succeed
Load ddrfw from eMMC, src: 0x00048200, des: 0xfffd0000, size: 0x0000c000, part: 0
Check phy result
INFO : End of initialization
INFO : End of 2D read delay Voltage center optimization
INFO : End of 2D read delay Voltage center optimization
INFO : End of 2D write delay Voltage center optimization
INFO : End of 2D write delay Voltage center optimization
INFO : Training has run successfully!

channel==0
RxClkDly_Margin_A0==236 ps 12
TxDqDly_Margin_A0==256 ps 13
RxClkDly_Margin_A1==0 ps 0
TxDqDly_Margin_A1==0 ps 0
TrainedVREFDQ_A0==74
TrainedVREFDQ_A1==0
VrefDac_Margin_A0==33
DeviceVref_Margin_A0==40
VrefDac_Margin_A1==0
DeviceVref_Margin_A1==0


channel==1
RxClkDly_Margin_A0==236 ps 12
TxDqDly_Margin_A0==256 ps 13
RxClkDly_Margin_A1==0 ps 0
TxDqDly_Margin_A1==0 ps 0
TrainedVREFDQ_A0==74
TrainedVREFDQ_A1==0
VrefDac_Margin_A0==33
DeviceVref_Margin_A0==40
VrefDac_Margin_A1==0
DeviceVref_Margin_A1==0

 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004

soc_vref_reg_value 0x 0000001c 0000001b 0000001a 00000019 00000018 0000001c 0000001a 0000001c 0000001b 0000001d 0000001c 0000001a 00000019 0000001d 0000001c 0000001c 0000001b 0000001e 0000001d 0000001c 0000001c 0000001d 0000001c 0000001c 0000001b 00000019 00000019 0000001b 0000001a 0000001a 00000019 0000001d dram_vref_reg_value 0x 00000057
2D training succeed
aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:53:31
auto size-- 65535DDR cs0 size: 2048MB
DDR cs1 size: 0MB
DMC_DDR_CTRL: 00c0002cDDR size: 2048MB
cs0 DataBus test pass
cs0 AddrBus test pass

100bdlr_step_size ps== 454
result report
boot times 0Enable ddr reg access
00000000
emmc switch 3 ok
Authentication key not yet programmed
get rpmb counter error 0x00000007
00000000
emmc switch 0 ok
Load FIP HDR from eMMC, src: 0x00010200, des: 0x01700000, size: 0x00004000, part: 0
Load BL3X from eMMC, src: 0x00078200, des: 0x01768000, size: 0x000b0000, part: 0
bl2z: ptr: 05129330, size: 00001e40
0.0;M3 CHK:0;cm4_sp_mode 0
MVN_1=0x00000000
MVN_2=0x00000000
[Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
OPS=0x30
ring efuse init
28 0b 30 00 01 0c 2c 00 00 0a 38 38 34 55 30 50
[0.017149 Inits done]
secure task start!
high task start!
low task start!
run into bl31
NOTICE:  BL31: v1.3(release):4fc40b1
NOTICE:  BL31: Built : 15:57:33, May 22 2019
NOTICE:  BL31: G12A normal boot!
NOTICE:  BL31: BL33 decompress pass
ERROR:   Error initializing runtime service opteed_fast


U-Boot 2015.01-g7386aaa (Aug 22 2021 - 11:36:23)

DRAM:  2 GiB
Relocation Offset is: 76e8e000
spi_post_bind(spifc): req_seq = 0
register usb cfg[0][1] = 0000000077f4b628
NAND:  MMC:   aml_priv->desc_buf = 0x0000000073e7ea70
aml_priv->desc_buf = 0x0000000073e80db0
SDIO Port B: 0, SDIO Port C: 1
co-phase 0x3, tx-dly 0, clock 400000
co-phase 0x3, tx-dly 0, clock 400000
co-phase 0x3, tx-dly 0, clock 400000
emmc/sd response timeout, cmd8, status=0x1ff2800
emmc/sd response timeout, cmd55, status=0x1ff2800
co-phase 0x3, tx-dly 0, clock 400000
co-phase 0x3, tx-dly 0, clock 40000000
aml_sd_retry_refix[983]:delay = 0x0,gadjust =0x172000
[mmc_startup] mmc refix success
init_part() 297: PART_TYPE_AML
[mmc_init] mmc init success
start dts,buffer=0000000073e83620,dt_addr=0000000073e83620
get_partition_from_dts() 91: ret 0
parts: 17
00:      logo   0000000000800000 1
01:  recovery   0000000001800000 1
02:      misc   0000000000800000 1
03:      dtbo   0000000000800000 1
04:  cri_data   0000000000800000 2
05:     param   0000000001000000 2
06:      boot   0000000001000000 1
set has_boot_slot = 0
07:       rsv   0000000001000000 1
08:  metadata   0000000001000000 1
09:    vbmeta   0000000000200000 1
10:       tee   0000000002000000 1
11:    vendor   0000000014000000 1
12:       odm   0000000008000000 1
13:    system   0000000050000000 1
14:   product   0000000008000000 1
15:     cache   0000000046000000 2
16:      data   ffffffffffffffff 4
init_part() 297: PART_TYPE_AML
eMMC/TSD partition table have been checked OK!
crc32_s:0x1577dad == storage crc_pattern:0x1577dad!!!
crc32_s:0xee152b83 == storage crc_pattern:0xee152b83!!!
crc32_s:0x79f50f07 == storage crc_pattern:0x79f50f07!!!
mmc env offset: 0x4d400000
In:    serial
Out:   serial
Err:   serial
reboot_mode=cold_boot
[store]To run cmd[emmc dtb_read 0x1000000 0x40000]
_verify_dtb_checksum()-3477: calc 1033eeac, store 1033eeac
_verify_dtb_checksum()-3477: calc 1033eeac, store 1033eeac
dtb_read()-3694: total valid 2
update_old_dtb()-3675: do nothing
amlkey_init() enter!
[EFUSE_MSG]keynum is 4
vpu: clk_level in dts: 7
vpu: vpu_power_on
vpu: set clk: 666667000Hz, readback: 666666667Hz(0x100)
vpu: vpu_module_init_config
vpp: vpp_init
vpp: vpp osd2 matrix rgb2yuv..............
aml_config_dtb 667
aml_config_dtb 697
co_phase = <0x00000003>
caps2 = "MMC_CAP2_HS200"
f_max = "
         ▒▒"
status = "disabled"
status = "okay"
Net:   No ethernet found.
CONFIG_AVB2: null
Start read misc partition datas!
info->magic =
info->version_major = 1
info->version_minor = 0
info->slots[0].priority = 15
info->slots[0].tries_remaining = 7
info->slots[0].successful_boot = 0
info->slots[1].priority = 14
info->slots[1].tries_remaining = 7
info->slots[1].successful_boot = 0
info->crc32 = -1075449479
active slot = 0
wipe_data=successful
wipe_cache=successful
upgrade_step=2
reboot_mode:::: cold_boot
amlkey_init() enter!
amlkey_init() 71: already init!
[EFUSE_MSG]keynum is 4
[KM]Error:f[key_manage_query_size]L515:key[usid] not programed yet
[KM]Error:f[key_manage_query_size]L515:key[mac] not programed yet
[KM]Error:f[key_manage_query_size]L515:key[deviceid] not programed yet
hpd_state=0
edid preferred_mode is <NULL>[0]
hdr mode is 0
dv  mode is ver:0  len: 0
hdr10+ mode is 0
[OSD]load fb addr from dts:/meson-fb
[OSD]set initrd_high: 0x7f800000
[OSD]fb_addr for logo: 0x7f800000
[OSD]load fb addr from dts:/meson-fb
[OSD]fb_addr for logo: 0x7f800000
[OSD]VPP_OFIFO_SIZE:0xfff01fff
[CANVAS]canvas init
[CANVAS]addr=0x7f800000 width=3840, height=2160
[OSD]osd_hw.free_dst_data: 0,719,0,575
[OSD]osd1_update_disp_freescale_enable
hdmitx: outputmode[576cvbs] is invalid
vpp: Rx hdr_info.hdr_sup_eotf_smpte_st_2084 = 0
amlkey_init() enter!
amlkey_init() 71: already init!
[EFUSE_MSG]keynum is 4
[KM]Error:f[key_manage_query_size]L515:key[usid] not programed yet
[KM]Error:f[key_manage_query_size]L515:key[mac] not programed yet
[KM]Error:f[key_manage_query_size]L515:key[deviceid] not programed yet
gpio: pin GPIOAO_3 (gpio 3) value is 1
Command: bcb uboot-command
Start read misc partition datas!
BCB hasn't any datas,exit!
amlkey_init() enter!
amlkey_init() 71: already init!
[EFUSE_MSG]keynum is 4
[KM]Error:f[key_manage_query_size]L515:key[usid] not programed yet
[KM]Error:f[key_manage_query_size]L515:key[mac] not programed yet
[KM]Error:f[key_manage_query_size]L515:key[deviceid] not programed yet
Hit Enter or space or Ctrl+C key to stop autoboot -- :  0
card out
** Bad device mmc 0 **
** Unrecognized filesystem type **
MMC Device 2 not found
** Bad device mmc 2 **
card out
(Re)start USB...
USB0:   USB3.0 XHCI init start
Register 3000140 NbrPorts 2
Starting the controller
USB XHCI 1.10
scanning bus 0 for devices... 1 USB Device(s) found
       scanning usb for storage devices... 0 Storage Device(s) found
** Bad device usb 0 **
** Bad device usb 1 **
** Bad device usb 2 **
** Bad device usb 3 **
** Unrecognized filesystem type **
pll tsensor avg: 0x1ec0, u_efuse: 0x1d
temp1: 29
ddr tsensor avg: 0x1eca, u_efuse: 0xd
temp2: 29
device cool done
CONFIG_SYSTEM_AS_ROOT: systemroot
system_mode: 1
Start read misc partition datas!
info->magic =
info->version_major = 1
info->version_minor = 0
info->slots[0].priority = 15
info->slots[0].tries_remaining = 7
info->slots[0].successful_boot = 0
info->slots[1].priority = 14
info->slots[1].tries_remaining = 7
info->slots[1].successful_boot = 0
info->crc32 = -1075449479
active slot = 0
CONFIG_AVB2: null
active_slot: normal
avb2: 0
ee_gate_off ...
avb2: 0
## Booting Android Image at 0x01080000 ...
Kernel command line: androidboot.dtbo_idx=0 --cmdline root=/dev/mmcblk0p18 buildvariant=userdebug
Start read misc partition datas!
info->magic =
info->version_major = 1
info->version_minor = 0
info->slots[0].priority = 15
info->slots[0].tries_remaining = 7
info->slots[0].successful_boot = 0
info->slots[1].priority = 14
info->slots[1].tries_remaining = 7
info->slots[1].successful_boot = 0
info->crc32 = -1075449479
active slot = 0
active_slot is normal
load dtb from 0x1000000 ......
find 1 dtbos
dtbos to be applied: 0
Apply dtbo 0
   Loading Kernel Image(COMP_NONE) ... OK
   kernel loaded at 0x01080000, end = 0x01997750
#7

You only need to put 3 backticks (```) in separate lines above and below your console output and they will be quoted.

You are supposed to hold the button (or short it) while plugging the cable. From what you said you seems to short it, release it, then plug the cable, which won’t work. Try short plug release.

#8

Apologies if I was unclear, but I am shorting it while plugging the cable in. If I do it incorrectly, as you say, android would load immediately. What the debug output above shows is me shorting the two button leads while plugging the cable in at the start. It has somewhat similar behavior to when I held the button down and powered it up (i.e. Starting at the “G12A…” line and printing to “reset…” then repeat), but on this debug it also has that section near the top after the first “reset…” where it prints this:

...
reset...
G12A:BL:0253b8:61aa2d;FEAT:E0F83180:2000;POC:D;RCY:0;USB:0;EMMC:0;READ:0;0.0
                                                                            l2_stage_init 0x01
bl2_stage_init 0x81
hw id:▒G12A:BL:0253b8:61aa2d;FEAT:E0F83180:2000;POC:D;RCY:0;USB:0;EMMC:0;READ:0;0.0
                                                                                   l2_stage_init 0x01
bl2_stage_init 0x81
hw id:▒G12A:BL:0253b8:61aa2d;FEAT:E0F83180:2000;POC:D;RCY:0;USB:0;EMMC:0;READ:0;0.0
                                                                                   l2_stage_init 0x01
bl2_stage_init 0x81
hw id:▒G12A:BL:0253b8:61aa2d;FEAT:E0F83180:2000;POC:D;RCY:0;USB:0;EMMC:0;READ:0;0.0
                                                                                   bl2_stage_init 0x01
bl2_stage_init 0x81
hw id:▒G12A:BL:0253b8:61aa2d;FEAT:E0F83180:2000;POC:D;RCY:0;USB:0;EMMC:0;READ:0;0.0?
                                                                                    bl2_stage_init 0x01
bl2_stage_init 0x81
hw id: 0x0001 - pwm id 0x00
bl2_stage_init 0xc0
bl2_stage_init 0x02

L0:00000000
...

You can consider the repeating sections thereafter the time in which I held the short after plugging the USB OTG port in, and I do not see android start to load (i.e. around “dmc_version 0000 \n Check phy result \n INFO : ERROR : Training has failed!:…”) until the short is released after the unit is already powered.

#9

I took some extra time this morning to set up the zero with a pushbutton switch on the OTG port power so I could be more sure I was shorting the USB BOOT leads as I applied power (pretty tricky plugging a USB-C in while holding tweezers on the right spot). Unfortunately I get the same result. When holding the short and applying power, I get the “G12A:… emmc swith 2 part fail … reset…” section previously mentioned repeating until the short is released, at which point it starts to load android. Looking more and more to me like there is a hardware failure with the USB BOOT.

#10

That does sound like the case. I’m sorry for the unpleasant experience you have experienced so far.

#11

No worries Yuntian, I work at a computer manufacturing facility so I’m well aware of the myriad of problems electronics can have. Does Radxa have means by which to RMA one of these devices? Or should I contact the distributor I purchased this from?

#12

You should contact the distributor for RMA process since you purchased directly from them.

#13

你好云天，我的板子这个问题同样有。论坛里也有好多人发帖表示这个按钮无效，无法在电脑上找到usb设备。我翻看了原理图，发现按下usbboot按钮，只会把emmcD5这个数据脚接地。

这行信息好像表示板子从emmc启动
所以将usbboot按钮连接到一个emmc数据脚的设计思路，是不是当按钮按下时，通过扰乱读取到的emmc数据，来迫使芯片进入maskrom？
但是这个方法好像对现在的s905芯片不起作用，它在emmc启动失败后又重启，还是从emmc读取，就是死循环。

这一点又说明，当按钮对于emmc数据脚的扰乱作用停止后，emmc正常读取并启动。
所以这个关于按钮的硬件设计，是否应该更改一下

如果你无法理解我说的上述内容，没有关系，因为这涉及到硬件设计本身。您可以把这个消息报告给设计人员或是技术支持。
感谢！