v1.5 Radxa Zero 1gb no eMMC it booted fine with the Radxa Focal Image.
Wanted Jammy though so downloaded Armbian 22.11 Jammy
It just went into a boot loop and what is even stranger go back to the original Radxa Focal and that is also the same and prob not mounting the root partition from what I can see or its only the 1st bootloader that is running.
It would seem the gpu isn’t working with the radxa images and Armbian does this
resetting ...
bl31 reboot reason: 0xd
bl31 reboot reason: 0x0
system cmd 1.
G12A:BL:0253b8:61aa2d;FEAT:E0F83180:2000;POC:F;RCY:0;EMMC:800;NAND:81;SD?:0;SD:0;READ:0;0.0
l2_stage_init 0x01
bl2_stage_init 0x81
hw id: 0x0001 - pwm id 0x00
bl2_stage_init 0xc0
bl2_stage_init 0x02
no sdio debug board detected
L0:00000000
L1:00000703
L2:00008067
L3:04000000
S1:00000000
B2:00002000
B1:e0f83180
TE: 123706
BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
Board ID = 2
Set cpu clk to 24M
Set clk81 to 24M
CPU clk: 1200 MHz
Set clk81 to 166.6M
DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
board id: 2
Load FIP HDR from SD, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 0
fw parse done
Load ddrfw from SD, src: 0x00060200, des: 0xfffd0000, size: 0x0000c000, part: 0
Load ddrfw from SD, src: 0x00038200, des: 0xfffd0000, size: 0x00004000, part: 0
PIEI prepare done
fastboot data load
fastboot data verify
verify result: 266
Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
LPDDR4 probe
ddr clk to 792MHz
Load ddrfw from SD, src: 0x0003c200, des: 0xfffd0000, size: 0x0000c000, part: 0
dmc_version 0000
Check phy result
INFO : ERROR : Training has failed!
1D training failed
Cfg max: 2, cur: 2. Board id: 255. Force loop cfg
LPDDR4 probe
ddr clk to 792MHz
Load ddrfw from SD, src: 0x0003c200, des: 0xfffd0000, size: 0x0000c000, part: 0
dmc_version 0000
Check phy result
INFO : End of CA training
INFO : End of initialization
INFO : Training has run successfully!
Check phy result
INFO : End of initialization
INFO : End of read enable training
INFO : End of fine write leveling
INFO : End of Write leveling coarse delay
INFO : Training has run successfully!
Check phy result
INFO : End of initialization
INFO : End of read dq deskew training
INFO : End of MPR read delay center optimization
INFO : End of write delay center optimization
INFO : End of read delay center optimization
INFO : End of max read latency training
INFO : Training has run successfully!
1D training succeed
Load ddrfw from SD, src: 0x00048200, des: 0xfffd0000, size: 0x0000c000, part: 0
Check phy result
INFO : End of initialization
INFO : End of 2D read delay Voltage center optimization
INFO : End of 2D read delay Voltage center optimization
INFO : End of 2D write delay Voltage center optimization
INFO : End of 2D write delay Voltage center optimization
INFO : Training has run successfully!
channel==0
RxClkDly_Margin_A0==197 ps 10
TxDqDly_Margin_A0==256 ps 13
RxClkDly_Margin_A1==0 ps 0
TxDqDly_Margin_A1==0 ps 0
TrainedVREFDQ_A0==74
TrainedVREFDQ_A1==0
VrefDac_Margin_A0==30
DeviceVref_Margin_A0==40
VrefDac_Margin_A1==0
DeviceVref_Margin_A1==0
channel==1
RxClkDly_Margin_A0==256 ps 13
TxDqDly_Margin_A0==256 ps 13
RxClkDly_Margin_A1==0 ps 0
TxDqDly_Margin_A1==0 ps 0
TrainedVREFDQ_A0==74
TrainedVREFDQ_A1==0
VrefDac_Margin_A0==29
DeviceVref_Margin_A0==40
VrefDac_Margin_A1==0
DeviceVref_Margin_A1==0
dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
soc_vref_reg_value 0x 00000019 0000001b 0000001b 00000018 0000001c 00000017 00000019 0000001a 0000001a 00000019 0000001a 0000001b 0000001a 00000019 0000001a 0000001c 0000001a 00000019 0000001a 00000018 0000001a 0000001b 00000019 00000018 0000001a 00000019 00000019 0000001a 00000018 00000019 00000018 0000001a dram_vref_reg_value 0x 00000063
2D training succeed
aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:53:31
auto size-- 65535DDR cs0 size: 1024MB
DDR cs1 size: 0MB
DMC_DDR_CTRL: 00c0002bDDR size: 1024MB
cs0 DataBus test pass
cs0 AddrBus test pass
100bdlr_step_size ps== 464
result report
boot times 0Enable ddr reg access
Load FIP HDR from SD, src: 0x00010200, des: 0x01700000, size: 0x00004000, part: 0
Load BL3X from SD, src: 0x0006c200, des: 0x0175c000, size: 0x00098000, part: 0
bl2z: ptr: 05129330, size: 00001e40
0.0;M3 CHK:0;cm4_sp_mode 0
MVN_1=0x00000000
MVN_2=0x00000000
[Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
OPS=0x30
ring efuse init
28 0c 30 00 01 15 38 00 00 01 35 38 37 43 46 50
[1.080711 Inits done]
secure task start!
high task start!
low task start!
run into bl31
NOTICE: BL31: v1.3(release):4fc40b1
NOTICE: BL31: Built : 15:57:33, May 22 2019
NOTICE: BL31: G12A normal boot!
NOTICE: BL31: BL33 decompress pass
ERROR: Error initializing runtime service opteed_fast
<debug_uart>
U-Boot 2022.10-armbian (Jan 01 2023 - 07:18:46 +0000) radxa-zero
Model: Radxa Zero
SoC: Amlogic Meson G12A (S905Y2) Revision 28:c (30:2)
DRAM: 1 GiB
Core: 382 devices, 23 uclasses, devicetree: separate
MMC: sd@ffe03000: 0, sd@ffe05000: 1, mmc@ffe07000: 2
Loading Environment from nowhere... OK
In: serial
Out: serial
Err: serial
Net: No ethernet found.
Hit any key to stop autoboot: 0
starting USB...
Bus usb@ff500000: Register 3000140 NbrPorts 3
Starting the controller
USB XHCI 1.10
scanning bus usb@ff500000 for devices... 4 USB Device(s) found
scanning usb for storage devices... 0 Storage Device(s) found
Device 0: unknown device
Card did not respond to voltage select! : -110
switch to partitions #0, OK
mmc1 is current device
Scanning mmc 1:1...
Found U-Boot script /boot/boot.scr
8147 bytes read in 3 ms (2.6 MiB/s)
## Executing script at 08000000
U-boot default fdtfile: amlogic/meson-g12a-radxa-zero.dtb
Current variant:
154 bytes read in 2 ms (75.2 KiB/s)
Current fdtfile after armbianEnv: amlogic/meson-g12a-radxa-zero.dtb
Mainline bootargs: root=UUID=01276fc8-467d-465a-9742-2f21e1cd11db rootwait rootfstype=ext4 splash=verbose console=ttyAML0,115200 console=tty1 consoleblank=0 coherent_pool=2M loglevel=1 ubootpart=1f4b7c5a-01 libata.force=noncq usb-storage.quirks= cgroup_enable=memory swapaccount=1
23607845 bytes read in 1023 ms (22 MiB/s)
27351552 bytes read in 1224 ms (21.3 MiB/s)
73859 bytes read in 7 ms (10.1 MiB/s)
232 bytes read in 5 ms (44.9 KiB/s)
Applying kernel provided DT fixup script (meson-fixup.scr)
## Executing script at 32000000
## Loading init Ramdisk from Legacy Image at 13000000 ...
Image Name: uInitrd
Image Type: AArch64 Linux RAMDisk Image (gzip compressed)
Data Size: 23607781 Bytes = 22.5 MiB
Load Address: 00000000
Entry Point: 00000000
Verifying Checksum ... OK
## Flattened Device Tree blob at 04080000
Booting using the fdt blob at 0x4080000
Loading Ramdisk to 3a8af000, end 3bf329e5 ... OK
Loading Device Tree to 000000003a834000, end 000000003a8aefff ... OK
"Synchronous Abort" handler, esr 0x96000004
elr: 00000000010630c4 lr : 0000000001052980 (reloc)
elr: 000000003dfb00c4 lr : 000000003df9f980
x0 : 089db8cebb13a788 x1 : 000000003dfb7708
x2 : 0000000000000010 x3 : 0000000000000000
x4 : 0000000000000000 x5 : 089db8cebb13a788
x6 : 000000003bf5b4a0 x7 : 0000000000000007
x8 : 0000000000000000 x9 : 0000000000000008
x10: 000000000000010c x11: 000000003bf371ec
x12: 0000000000000074 x13: 000000003bf371a8
x14: 000000003a834000 x15: 0000000000000020
x16: 000000003df7df84 x17: 0000000000000000
x18: 000000003bf4adb0 x19: 000000003af37040
x20: 000000003df4db20 x21: 000000003dfb7708
x22: 0000000000000300 x23: 000000003bf5b3f0
x24: 000000003dfd7b10 x25: 0000000005300000
x26: 0000000000300000 x27: 0000000000000000
x28: 0000000000000300 x29: 000000003bf371b0
Code: eb02009f 54000061 52800000 14000006 (386468a3)
Resetting CPU ...