hey guys im trying to figure out what’s going on with my radxa zero. i’ve tried to reach out by using the “contact us” on the website. anyways heres whats going on. the first day i got the radxa zero i followed the guide and was not able to immediately clear the emmc. after some time i was able to clear it and install the ubuntu os on it, but when i tried to turn it on, i had no output from the micro HDMI port. so i tried to clear it again, now i get nothing. after i clear the emmc as per the guide, it doesn’t show up as a usb storage. here is my output from lsusb
lsusb :
Bus 002 Device 003: ID 046d:c534 Logitech, Inc. Unifying Receiver
Bus 002 Device 002: ID 8087:0024 Intel Corp. Integrated Rate Matching Hub
Bus 002 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub
Bus 001 Device 003: ID 0bda:8771 Realtek Semiconductor Corp.
Bus 001 Device 002: ID 8087:0024 Intel Corp. Integrated Rate Matching Hub
Bus 001 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub
Bus 004 Device 001: ID 1d6b:0003 Linux Foundation 3.0 root hub
Bus 003 Device 011: ID 1b8e:c003 Amlogic, Inc. GX-CHIP
Bus 003 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub
it shows its there but when i use lsblk or fdisk -l its nowhere to be found.
using: sudo boot-g12.py radxa-zero-erase-emmc.bin
Firmware Version :
ROM: 3.2 Stage: 0.0
Need Password: 0 Password OK: 1
Writing radxa-zero-erase-emmc.bin at 0xfffa0000…
[DONE]
Running at 0xfffa0000…
[DONE]
AMLC dataSize=16384, offset=65536, seq=0…
[DONE]
AMLC dataSize=49152, offset=393216, seq=1…
[DONE]
AMLC dataSize=16384, offset=229376, seq=2…
[DONE]
AMLC dataSize=49152, offset=245760, seq=3…
[DONE]
AMLC dataSize=16384, offset=65536, seq=4…
[DONE]
AMLC dataSize=49152, offset=393216, seq=5…
[DONE]
AMLC dataSize=16384, offset=229376, seq=6…
[DONE]
AMLC dataSize=49152, offset=245760, seq=7…
[DONE]
AMLC dataSize=49152, offset=294912, seq=8…
[DONE]
AMLC dataSize=16384, offset=65536, seq=9…
[DONE]
AMLC dataSize=1324400, offset=81920, seq=10…
[DONE]
[BL2 END]
ALSO my serial console output
G12A:BL:0253b8:61aa2d;FEAT:E0F83180:2000;POC:F;RCY:0;EMMC:0;READ:0;CHK:1F;READ:?
1
bl2_stage_init 0x81
hw id: 0x0001 - pwm id 0x00
bl2_stage_init 0xc0
bl2_stage_init 0x02
L0:00000000
L1:00000703
L2:00008067
L3:04000000
S1:00000000
B2:00002000
B1:e0f83180
TE: 177440
BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
Board ID = 2
Set cpu clk to 24M
Set clk81 to 24M
CPU clk: 1200 MHz
Set clk81 to 166.6M
eMMC boot @ 1
sw8 s
DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
board id: 2
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, par1
fw parse done
Load ddrfw from eMMC, src: 0x00060200, des: 0xfffd0000, size: 0x0000c000, part:1
Load ddrfw from eMMC, src: 0x00038200, des: 0xfffd0000, size: 0x00004000, part:1
PIEI prepare done
fastboot data load
00000000
emmc switch 2 ok
ddr saved addr:00016000
Load ddr parameter from eMMC, src: 0x02c00000, des: 0xfffd0000, size: 0x00001000
00000000
emmc switch 0 ok
fastboot data verify
verify result: 267
Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
LPDDR4 probe
ddr clk to 792MHz
Load ddrfw from eMMC, src: 0x0003c200, des: 0xfffd0000, size: 0x0000c000, part:1
00000000
emmc switch 1 ok
dmc_version 0000
Check phy result
INFO : ERROR : Training has failed!
1D training failed
Cfg max: 2, cur: 2. Board id: 255. Force loop cfg
LPDDR4 probe
ddr clk to 792MHz
Load ddrfw from eMMC, src: 0x0003c200, des: 0xfffd0000, size: 0x0000c000, part:1
dmc_version 0000
Check phy result
INFO : End of CA training
INFO : End of initialization
INFO : Training has run successfully!
Check phy result
INFO : End of initialization
INFO : End of read enable training
INFO : End of fine write leveling
INFO : End of Write leveling coarse delay
INFO : Training has run successfully!
Check phy result
INFO : End of initialization
INFO : End of read dq deskew training
INFO : End of MPR read delay center optimization
INFO : End of write delay center optimization
INFO : End of read delay center optimization
INFO : End of max read latency training
INFO : Training has run successfully!
1D training succeed
Load ddrfw from eMMC, src: 0x00048200, des: 0xfffd0000, size: 0x0000c000, part:1
Check phy result
INFO : End of initialization
INFO : End of 2D read delay Voltage center optimization
INFO : End of 2D read delay Voltage center optimization
INFO : End of 2D write delay Voltage center optimization
INFO : End of 2D write delay Voltage center optimization
INFO : Training has run successfully!
channel==0
RxClkDly_Margin_A0==236 ps 12
TxDqDly_Margin_A0==256 ps 13
RxClkDly_Margin_A1==0 ps 0
TxDqDly_Margin_A1==0 ps 0
TrainedVREFDQ_A0==74
TrainedVREFDQ_A1==0
VrefDac_Margin_A0==31
DeviceVref_Margin_A0==40
VrefDac_Margin_A1==0
DeviceVref_Margin_A1==0
channel==1
RxClkDly_Margin_A0==256 ps 13
TxDqDly_Margin_A0==256 ps 13
RxClkDly_Margin_A1==0 ps 0
TxDqDly_Margin_A1==0 ps 0
TrainedVREFDQ_A0==74
TrainedVREFDQ_A1==0
VrefDac_Margin_A0==31
DeviceVref_Margin_A0==40
VrefDac_Margin_A1==0
DeviceVref_Margin_A1==0
dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
soc_vref_reg_value 0x 0000001a 00000019 0000001c 0000001b 0000001a 00000016 0003
2D training succeed
aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:53:31
auto size-- 65535DDR cs0 size: 2048MB
DDR cs1 size: 0MB
DMC_DDR_CTRL: 00c0002cDDR size: 2048MB
cs0 DataBus test pass
cs0 AddrBus test pass
100bdlr_step_size ps== 460
result report
boot times 0Enable ddr reg access
00000000
emmc switch 3 ok
Authentication key not yet programmed
get rpmb counter error 0x00000007
00000000
emmc switch 1 ok
Load FIP HDR from eMMC, src: 0x00010200, des: 0x01700000, size: 0x00004000, par1
Load BL3X from eMMC, src: 0x00078200, des: 0x01768000, size: 0x000b0000, part: 1
bl2z: ptr: 05129330, size: 00001e40
0.0;M3 CHK:0;cm4_sp_mode 0
MVN_1=0x00000000
MVN_2=0x00000000
[Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
OPS=0x30
ring efuse init
28 0b 30 00 01 2d 0e 00 00 09 38 38 34 55 30 50
[0.017150 Inits done]
secure task start!
high task start!
low task start!
run into bl31
NOTICE: BL31: v1.3(release):4fc40b1
NOTICE: BL31: Built : 15:57:33, May 22 2019
NOTICE: BL31: G12A normal boot!
NOTICE: BL31: BL33 decompress pass
ERROR: Error initializing runtime service opteed_fast
U-Boot 2015.01-g7386aaa (Aug 22 2021 - 11:36:23)
DRAM: 2 GiB
Relocation Offset is: 76e8e000
spi_post_bind(spifc): req_seq = 0
register usb cfg[0][1] = 0000000077f4b628
NAND: MMC: aml_priv->desc_buf = 0x0
any help would be much appricated, if i have to buy another board because this one is done for, i dont mind i would just like to know if its a software, hardware, or a me issue.