Rock5b-plus适配imx290出现问题,急求帮助!!

您好,我最近在ROCK5B-PLUS适配IMX290出现问题,由于我能力问题,无法进一步确定原因,希望您能帮忙看看。

需求设计:

  1. 根据ROCK5B-PLUS的MIPI CSI CAM硬件接口定义,定制了IMX290模组,大部分都与ROCK5B-PLUS CSI引脚定义一致,只是将FPC线的28,29,30分别定义为IMX290的vddd、vdddo、vdda,和ROCK5B-PLUS的MIPI CSI CAM的28、29、30定义不太一致。
  2. 参照Radxa Camera 4K的设备树实现了IMX290的Overlay设备树,并在内核源码中启用了编译了IMX290驱动。
  3. 如图所示连接IMX290与ROCK5B-PLUS的CAM0口;

问题描述:

在系统中启用IMX290设备树,并加载imx290.ko;打印以下错误:

疑问:

  1. 我的IMX290设备树实现有什么问题吗?
  2. ROCK5B-PLUS的28、29、30引脚可以配置为(vddd、vdddo、vdda)对应的电压范围吗?

相关资料:

ROCK5B-PLUS CSI2引脚定义:
Image

IMX290模组CSI2的引脚定义:
Image

IMX290设备树实现:

/dts-v1/;
/plugin/;

#include <dt-bindings/clock/rk3588-cru.h>
#include <dt-bindings/power/rk3588-power.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>

/ {
	metadata {
		title ="Enable Radxa Camera IMX290 on CAM0";
		compatible = "radxa,rock-5b-plus";
		category = "camera";
		exclusive = "csi2_dphy0";
		description = "Enable Radxa Camera IMX290 on CAM0.";
	};

	fragment@0 {
		target = <&i2c3>;

		__overlay__ {
			pinctrl-names = "default";
			pinctrl-0 = <&i2c3m0_xfer>;
			status = "okay";
			#address-cells = <1>;
			#size-cells = <0>;

			imx290: imx290@1a {
				status = "okay";
				compatible = "sony,imx290";
				reg = <0x1a>;
				clocks = <&cru CLK_MIPI_CAMARAOUT_M3>;
				clock-names = "xclk";
				clock-frequency = <37125000>; 
				pinctrl-names = "default";
				pinctrl-0 = <&mipim0_camera1_clk>;

				/* 电源按顺序定义 */
				vddd-supply = <&camera_vddd_1v3>;
				vdddo-supply = <&camera_vdddo_1v8>;
				vdda-supply = <&camera_vdda_2v8>;


				/* 复位信号 */
				reset-gpios = <&gpio4 RK_PA0 GPIO_ACTIVE_LOW>;

				rockchip,camera-module-index = <0>;
				rockchip,camera-module-facing = "front";
				rockchip,camera-module-name = "RADXA-CAMERA-IMX290"; 
				rockchip,camera-module-lens-name = "DEFAULT";
				port {
					imx290_out0: endpoint {
						remote-endpoint = <&mipidphy0_in_ucam0>;
						data-lanes = <1 2 3 4>;
						link-frequencies = /bits/ 64 <222750000 148500000>;
					};
				};
			};
		};
	};

	fragment@1 {
		target = <&csi2_dphy0_hw>;

		__overlay__ {
			status = "okay";
		};
	};

	fragment@2 {
		target = <&csi2_dphy0>;

		__overlay__ {
			status = "okay";

			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				port@0 {
					reg = <0>;
					#address-cells = <1>;
					#size-cells = <0>;

					mipidphy0_in_ucam0: endpoint@1 {
						reg = <1>;
						remote-endpoint = <&imx290_out0>;
						data-lanes = <1 2 3 4>;
					};
				};

				port@1 {
					reg = <1>;
					#address-cells = <1>;
					#size-cells = <0>;

					csidphy0_out: endpoint@0 {
						reg = <0>;
						remote-endpoint = <&mipi2_csi2_input>;
					};
				};
			};
		};
	};

	fragment@3 {
		target = <&mipi2_csi2>;

		__overlay__ {
			status = "okay";

			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				port@0 {
					reg = <0>;
					#address-cells = <1>;
					#size-cells = <0>;

					mipi2_csi2_input: endpoint@1 {
						reg = <1>;
						remote-endpoint = <&csidphy0_out>;
					};
				};

				port@1 {
					reg = <1>;
					#address-cells = <1>;
					#size-cells = <0>;

					mipi2_csi2_output: endpoint@0 {
						reg = <0>;
						remote-endpoint = <&cif_mipi2_in0>;
					};
				};
			};
		};
	};

	fragment@4 {
		target = <&rkcif>;

		__overlay__ {
			status = "okay";
		};
	};

	fragment@5 {
		target = <&rkcif_mipi_lvds2>;

		__overlay__ {
			status = "okay";

			port {
				cif_mipi2_in0: endpoint {
					remote-endpoint = <&mipi2_csi2_output>;
				};
			};
		};
	};

	fragment@6 {
		target = <&rkcif_mipi_lvds2_sditf>;

		__overlay__ {
			status = "okay";

			port {
				mipi_lvds2_sditf: endpoint {
					remote-endpoint = <&isp0_vir0>;
				};
			};
		};
	};

	fragment@7 {
		target = <&rkcif_mmu>;

		__overlay__ {
			status = "okay";
		};
	};

	fragment@8 {
		target = <&isp0_mmu>;

		__overlay__ {
			status = "okay";
		};
	};

	fragment@9 {
		target = <&rkisp0>;

		__overlay__ {
			status = "okay";
		};
	};

	fragment@10 {
		target = <&rkisp0_vir0>;

		__overlay__ {
			status = "okay";

			port {
				#address-cells = <1>;
				#size-cells = <0>;

				isp0_vir0: endpoint@0 {
					reg = <0>;
					remote-endpoint = <&mipi_lvds2_sditf>;
				};
			};
		};
	};

	fragment@11 {
		target-path = "/";
		__overlay__ {
			/* 第一级:3.3V转1.3V (DVDD) */
			camera_vddd_1v3: regulator-vddd {
				compatible = "regulator-fixed";
				regulator-name = "camera_vddd_1v3";
				regulator-min-microvolt = <1300000>;
				regulator-max-microvolt = <1300000>;
				/* 指定输入源为PMUIO2的3.3V */
				vin-supply = <&vcc_3v3_s3>; 
				gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; // 使能引脚
				enable-active-high;
				startup-delay-us = <1000>;
				pinctrl-names = "default";
				pinctrl-0 = <&cam_pwdn_gpio>;
			};

			/* 第二级:1.3V转1.8V (I/O电源) */
			camera_vdddo_1v8: regulator-vdddo {
				compatible = "regulator-fixed";
				regulator-name = "camera_vdddo_1v8";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				/* 依赖DVDD的输出 */
				vin-supply = <&camera_vddd_1v3>; 
				startup-delay-us = <1000>;
			};

			/* 第三级:1.8V转2.8V (模拟电源) */
			camera_vdda_2v8: regulator-vdda {
				compatible = "regulator-fixed";
				regulator-name = "camera_vdda_2v8";
				regulator-min-microvolt = <2800000>;
				regulator-max-microvolt = <2800000>;
				/* 依赖I/O电源的输出 */
				vin-supply = <&camera_vdddo_1v8>;
				startup-delay-us = <1000>;
			};
		};
	};
	// fragment@12 {
	// 	/* GPIO引脚控制配置 */
	// 	target = <&pinctrl>;
	// 	__overlay__ {
	// 		pwdn_gpio: pwdn-gpio {
	// 		/* 复位信号配置 */
	// 			rockchip,pins = <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
			
	// 		};
	// 	};
	// };

};