Rock 5B PCIe Endpoint does not appear under /sys/class/pci_epc/

#1

Hello,

I am trying to use the Rock 5B board as a PCIe Endpoint (EP) device.

I followed the official documentation to rebuild the kernel:

I modified the kernel configuration to enable all necessary PCIe EP options. Specifically, I added the following to linux/rk2410/0001-common/kconfig.conf:

# PCIe Endpoint and Rockchip PCIe controller
CONFIG_PCI=y
CONFIG_PCI_DOMAINS=y
CONFIG_PCIEPORTBUS=y

CONFIG_PCIEASPM=y
CONFIG_PCIEASPM_DEFAULT=y
CONFIG_PCIEASPM_PERFORMANCE=y

CONFIG_PCIE_ROCKCHIP_HOST=y
CONFIG_PCIE_ROCKCHIP_EP=y
CONFIG_PCIE_ROCKCHIP_DMA=y

CONFIG_PCI_ENDPOINT=y
CONFIG_PCI_ENDPOINT_CONFIGFS=y
CONFIG_PCI_EPF_TEST=m
CONFIG_PCI_ENDPOINT_TEST=m
CONFIG_PCI_ENDPOINT_NTB=m

CONFIG_PCI_MSI=y
CONFIG_PCI_MSI_IRQ_DOMAIN=y
CONFIG_PCI_QUIRKS=y
CONFIG_PCI_LABEL=y

CONFIG_PCIE_DW_ROCKCHIP_EP=y

I also removed the line # CONFIG_PCIE_DW_ROCKCHIP_EP is not set from linux/rk2410/kconfig.conf.

In the device tree:

  • I added a new pcie3x4_ep node in rk3588.dtsi at address fe150000, with the following content:
pcie3x4_ep: pcie_ep@fe150000 {
    compatible = "rockchip,rk3588-pcie-ep";
    clocks = <&cru ACLK_PCIE_4L_MSTR>, <&cru ACLK_PCIE_4L_SLV>,
             <&cru ACLK_PCIE_4L_DBI>, <&cru PCLK_PCIE_4L>,
             <&cru CLK_PCIE_AUX0>, <&cru CLK_PCIE4L_PIPE>;
    clock-names = "aclk_mst", "aclk_slv", "aclk_dbi", "pclk", "aux", "pipe";
    interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>,
                 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>,
                 <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>,
                 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
    interrupt-names = "sys", "pmc", "msg", "err", "dma0", "dma1", "dma2", "dma3";
    max-link-speed = <3>;
    num-lanes = <4>;
    phys = <&pcie30phy>;
    phy-names = "pcie-phy";
    power-domains = <&power RK3588_PD_PCIE>;
    reg = <0xa 0x40000000 0x0 0x00100000>,   // dbi
          <0xa 0x40100000 0x0 0x00100000>,   // dbi2
          <0x0 0xfe150000 0x0 0x00010000>,   // apb
          <0x9 0x00000000 0x0 0x40000000>,   // addr_space
          <0xa 0x40300000 0x0 0x00100000>;   // atu
    reg-names = "dbi", "dbi2", "apb", "addr_space", "atu";
    resets = <&cru SRST_PCIE0_POWER_UP>, <&cru SRST_P_PCIE0>;
    reset-names = "pwr", "pipe";
    status = "disabled"; // overridden in rock-5b.dts
};

Then in rk3588-rock-5b.dts, I disabled the Root Port (pcie3x4) and enabled the Endpoint port (pcie3x4_ep):

&pcie3x4 {
    reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
    vpcie3v3-supply = <&vcc3v3_pcie30>;
    status = "disabled";
};

&pcie3x4_ep {
    vpcie3v3-supply = <&vcc3v3_pcie30>;
    reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
    status = "okay";
};

After rebuilding and flashing the kernel and DTB, the board boots fine, but:

/sys/class/pci_epc/ is empty.

dmesg | grep -i pcie only shows logs related to Root Ports.

No PCIe EP-related logs appear.

My Questions:
Is there anything missing to fully enable PCIe EP mode on Rock 5B?

Is there any runtime step (like configfs or module loading) needed after boot?

How can I verify that the pcie3x4_ep node is actually parsed and probed at boot?

Any help would be greatly appreciated!

Thank you.