Radxa Zero GPIO Question

I am planning to use both SPI interfaces /spi0.0 and /spi1.0 on the Zero. So header pins 12, 13, 16, 18, 19, 21, 23, 24 will be dedicated for SPI.

I have 8 SPI peripherals that I need to retrieve data from at any time so I’ll need 8 chipselect signals. Can I use any of the remaining header pins (labeled GPIO under Function1) as a chipselect signal for the SPI peripherals?

We exposed 2 SPI buses, but only provide SS0 for each, meaning natively they only support 1 device each.

In this case you should check if you can use spi-gpio driver and get acceptable performance. A naive search seems to indicate it can support 256 slave devices.