The UEFI GOP of the o6 does not work on some high-resolution, high-refresh-rate monitors (e.g., my display defaults to 2880×1800 @90Hz), resulting in a black screen, but it functions properly at 1080p resolution on my Rock5B UEFI.
NOTICE: BL2: v2.7(debug):Beta_2.0.3_release
NOTICE: BL2: Built : 20:04:34, Jan 15 2025
CRYPTO_LITE TOP_STAT_CFG0_STAT:0x70018c63
CRYPTO_LITE Wait SW initialization done!
CRYPTO_LITE Software initialization done!
CRYPTO_LITE Current host ID: 1
CRYPTO_LITE RN_POOL is: Secure
CRYPTO_LITE ACA is: Secure
CRYPTO_LITE HASH is: Secure
CRYPTO_LITE SCA is: Secure
CRYPTO_LITE ACA SRAM size: 8192 Bytes
CRYPTO_LITE ACA CQ depth: 8
CRYPTO_LITE HASH CQ depth: 8
CRYPTO_LITE SCA CQ depth: 8
CRYPTO_LITE HASH long ctx number: 4
CRYPTO_LITE HASH short ctx number: 4
CRYPTO_LITE SCA long ctx number: 4
CRYPTO_LITE SCA short ctx number: 4
CRYPTO_LITE OTP device initial value: 1
CRYPTO_LITE OTP shadow registers save to AO
CRYPTO_LITE OTP device: NOT exist
CRYPTO_LITE TRNG internal source: Exist
CRYPTO_LITE CE Version: EAC REL r3p1
INFO: Using crypto library 'CIX SEC'
INFO: BL2: Doing platform setup
INFO: Configuring TrustZone Controller
INFO: Total 2 regions set.
INFO: Configuring TrustZone Controller
INFO: Total 2 regions set.
INFO: Configuring TrustZone Controller
INFO: Total 2 regions set.
INFO: Configuring TrustZone Controller
INFO: Total 2 regions set.
INFO: BL2: Loading image id 3
INFO: Loading image id=7 at address 0x80200000
INFO: pb.tfabde:0
INFO: Flash load BL3X!
INFO: Image id=7 loaded: 0x80200000 - 0x80200650
INFO: SE lc: 7, sec: 1, img_id: 7
INFO: copy ROTPK from DDR
INFO: copy done
INFO: rsa len: 384
padding_type:3
rsa bits:5
CRYPTO_LITE RSA verify pass, pkcs2v1
INFO: md_alg: 6
INFO: hash_len: 32
INFO: Loading image id=9 at address 0x80200000
INFO: pb.tfabde:0
INFO: Flash load BL3X!
INFO: Image id=9 loaded: 0x80200000 - 0x8020065a
INFO: SE lc: 7, sec: 1, img_id: 9
INFO: rsa len: 384
padding_type:3
rsa bits:5
CRYPTO_LITE RSA verify pass, pkcs2v1
INFO: Loading image id=13 at address 0x80200000
INFO: pb.tfabde:0
INFO: Flash load BL3X!
INFO: Image id=13 loaded: 0x80200000 - 0x80200530
INFO: SE lc: 7, sec: 1, img_id: 13
INFO: rsa len: 384
padding_type:3
rsa bits:5
CRYPTO_LITE RSA verify pass, pkcs2v1
INFO: Loading image id=3 at address 0x80200000
INFO: pb.tfabde:0
INFO: Flash load BL3X!
INFO: Image id=3 loaded: 0x80200000 - 0x8021961d
INFO: SE lc: 7, sec: 1, img_id: 3
INFO: BL2: Loading image id 4
INFO: Loading image id=10 at address 0x80500000
INFO: pb.tfabde:0
INFO: Flash load BL3X!
INFO: Image id=10 loaded: 0x80500000 - 0x80500668
INFO: SE lc: 7, sec: 1, img_id: 10
INFO: rsa len: 384
padding_type:3
rsa bits:5
CRYPTO_LITE RSA verify pass, pkcs2v1
INFO: Loading image id=14 at address 0x80500000
INFO: pb.tfabde:0
INFO: Flash load BL3X!
INFO: Image id=14 loaded: 0x80500000 - 0x805005ce
INFO: SE lc: 7, sec: 1, img_id: 14
INFO: rsa len: 384
padding_type:3
rsa bits:5
CRYPTO_LITE RSA verify pass, pkcs2v1
INFO: Loading image id=4 at address 0x80500000
INFO: pb.tfabde:0
INFO: Flash load BL3X!
INFO: Image id=4 loaded: 0x80500000 - 0x805cd8d8
INFO: SE lc: 7, sec: 1, img_id: 4
INFO: BL2: Loading image id 5
INFO: Loading image id=36 at address 0x84400000
INFO: pb.tfabde:0
INFO: Flash load BL3X!
INFO: Image id=36 loaded: 0x84400000 - 0x8440063a
INFO: SE lc: 7, sec: 1, img_id: 36
INFO: copy ROTPK from DDR
INFO: copy done
INFO: rsa len: 384
padding_type:3
rsa bits:5
CRYPTO_LITE RSA verify pass, pkcs2v1
INFO: md_alg: 6
INFO: hash_len: 32
INFO: Loading image id=11 at address 0x84400000
INFO: pb.tfabde:0
INFO: Flash load BL3X!
INFO: Image id=11 loaded: 0x84400000 - 0x8440066b
INFO: SE lc: 7, sec: 1, img_id: 11
INFO: rsa len: 384
padding_type:3
rsa bits:5
CRYPTO_LITE RSA verify pass, pkcs2v1
INFO: Loading image id=15 at address 0x84400000
INFO: pb.tfabde:0
INFO: Flash load BL3X!
INFO: Image id=15 loaded: 0x84400000 - 0x84400541
INFO: SE lc: 7, sec: 1, img_id: 15
INFO: rsa len: 384
padding_type:3
rsa bits:5
CRYPTO_LITE RSA verify pass, pkcs2v1
INFO: Loading image id=5 at address 0x84400000
INFO: pb.tfabde:0
INFO: Flash load BL3X!
INFO: Image id=5 loaded: 0x84400000 - 0x84600000
INFO: SE lc: 7, sec: 1, img_id: 5
NOTICE: BL2: Booting BL31
INFO: Entry point address = 0x80200000
INFO: SPSR = 0x3cd
INFO: Start sky1 scmi server!
NOTICE: BL31: v2.7(debug):Beta_2.0.3_release
NOTICE: BL31: Built : 20:04:34, Jan 15 2025
INFO: boot_core_index 10
INFO: cpu mask 0xa000
INFO: GICv4 without legacy support detected.
INFO: ARM GICv4 driver initialized in EL3
INFO: Maximum SPI INTID supported: 543
INFO: drv_mbox_init
INFO: Send CMD: ECHO Request
NOTICE: Send CMD: 0x82000001
INFO: Got Echo RSP, Mbox channel is ready...
INFO: plat_cix_scmi_setup
INFO: SCMI driver initialized
INFO: ###########ni700-qos setting###########################
INFO: [MMHUB_CSI_SLV0]:override--1 read_qos--0f write_qos--0f
INFO: [MMHUB_CSI_SLV1]:override--1 read_qos--0f write_qos--0f
INFO: [MMHUB_CSI_SLV0]:override--1 read_qos--0f write_qos--0f
INFO: [MMHUB_CSI_SLV0]:override--1 read_qos--0f write_qos--0f
INFO: [MMHUB_DPU0_AFBC_SLV]:override--1 read_qos--0f write_qos--0f
INFO: [MMHUB_DPU0_SLV0]:override--1 read_qos--0f write_qos--0f
INFO: [MMHUB_DPU0_SLV1]:override--1 read_qos--0f write_qos--0f
INFO: [MMHUB_DPU1_AFBC_SLV]:override--1 read_qos--0f write_qos--0f
INFO: [MMHUB_DPU1_SLV0]:override--1 read_qos--0f write_qos--0f
INFO: [MMHUB_DPU1_SLV1]:override--1 read_qos--0f write_qos--0f
INFO: [MMHUB_DPU2_AFBC_SLV]:override--1 read_qos--0f write_qos--0f
INFO: [MMHUB_DPU2_SLV0]:override--1 read_qos--0f write_qos--0f
INFO: [MMHUB_DPU2_SLV1]:override--1 read_qos--0f write_qos--0f
INFO: [MMHUB_DPU3_AFBC_SLV]:override--1 read_qos--0f write_qos--0f
INFO: [MMHUB_DPU3_SLV0]:override--1 read_qos--0f write_qos--0f
INFO: [MMHUB_DPU3_SLV1]:override--1 read_qos--0f write_qos--0f
INFO: [MMHUB_DPU4_AFBC_SLV]:override--1 read_qos--0f write_qos--0f
INFO: [MMHUB_DPU4_SLV0]:override--1 read_qos--0f write_qos--0f
INFO: [MMHUB_DPU4_SLV1]:override--1 read_qos--0f write_qos--0f
INFO: [MMHUB_ISP_AFBC_SLV]:override--1 read_qos--0f write_qos--0f
INFO: [MMHUB_ISP_SLV0]:override--1 read_qos--0f write_qos--0f
INFO: [MMHUB_ISP_SLV1]:override--1 read_qos--0f write_qos--0f
INFO: [MMHUB_NPU_SLV0]:override--1 read_qos--0d write_qos--0d
INFO: [MMHUB_NPU_SLV1]:override--1 read_qos--0d write_qos--0d
INFO: [MMHUB_VPU_SLV0]:override--1 read_qos--0d write_qos--0d
INFO: [MMHUB_VPU_SLV1]:override--1 read_qos--0d write_qos--0d
INFO: [SYSHUB_AUIDO_SLV]:override--1 read_qos--0f write_qos--0f
INFO: [SYSHUB_USB2_0_SLV]:override--1 read_qos--08 write_qos--08
INFO: [SYSHUB_USB2_1_SLV]:override--1 read_qos--08 write_qos--08
INFO: [SYSHUB_USB2_2_SLV]:override--1 read_qos--08 write_qos--08
INFO: [SYSHUB_USB2_3_SLV]:override--1 read_qos--0f write_qos--0f
INFO: [SYSHUB_USB3_0_SLV]:override--1 read_qos--08 write_qos--08
INFO: [SYSHUB_USB3_1_SLV]:override--1 read_qos--08 write_qos--08
INFO: [SYSHUB_USBC_0_SLV]:override--1 read_qos--08 write_qos--08
INFO: [SYSHUB_USBC_1_SLV]:override--1 read_qos--08 write_qos--08
INFO: [SYSHUB_USBC_2_SLV]:override--1 read_qos--08 write_qos--08
INFO: [SYSHUB_USBC_DRD_SLV]:override--1 read_qos--08 write_qos--08
INFO: ######################################################
INFO: ###########ci700-qos setting###########################
INFO: [CI700_RNF0]:override--1 read_qos--0d write_qos--0d
INFO: [CI700_RNF1]:override--1 read_qos--0d write_qos--0d
INFO: [CI700_RNF2]:override--1 read_qos--0d write_qos--0d
INFO: [CI700_RNF3]:override--1 read_qos--0d write_qos--0d
INFO: [CI700_GPU_RNI64_S0]:override[r-w]--[1-1] read_qos--0b write_qos--0b
INFO: [CI700_GPU_RNI64_S1]:override[r-w]--[1-1] read_qos--0b write_qos--0b
INFO: [CI700_GPU_RNI72_S0]:override[r-w]--[1-1] read_qos--0b write_qos--0b
INFO: [CI700_GPU_RNI72_S1]:override[r-w]--[1-1] read_qos--0b write_qos--0b
INFO: [CI700_PCIE]:override[r-w]--[1-1] read_qos--08 write_qos--08
INFO: [CI700_SYSHUB_SMMU]:override[r-w]--[1-1] read_qos--0f write_qos--0f
INFO: [CI700_DFD_TMC]:override[r-w]--[1-1] read_qos--0f write_qos--0f
INFO: [CI700_MMHUB_SMMU]:override[r-w]--[1-1] read_qos--0f write_qos--0f
INFO: [CI700_PCIEHUB_SMMU]:override[r-w]--[1-1] read_qos--0f write_qos--0f
INFO: ######################################################
INFO: cix_qspi_init start...
INFO: cix_qspi_init end...
INFO: BL31: Initialising Exception Handling Framework
INFO: BL31: Initializing runtime services
INFO: last reboot reason:0x10
INFO: BL31: cortex_hunter: CPU workaround for cve_2022_23960 was applied
INFO: SDEI platform setup
INFO: BL31: Initializing BL32
E/TC:10 console_init:108 Cix uart register successful
E/TC:10 console_init:108 Cix uart register successful
I/TC:
I/TC: OP-TEE version: Beta_2.0.3_release #1 Wed, 15 Jan 2025 20:08:15 +0800 aarch64
I/TC: OP-TEE cix version: Beta_2.0.3_release-3.17-0af95526e956
I/TC: WARNING: This OP-TEE configuration might be insecure!
I/TC: WARNING: Please check https://optee.readthedocs.io/en/latest/architecture/porting_guidelines.html
I/TC: Primary CPU initializing
MBEDTLS_CORE host[1] waits sw_init_done...MBEDTLS_CORE [DONE]
MBEDTLS_CORE HASH driver init success!
MBEDTLS_CORE SCA driver init success!
MBEDTLS_CORE SRAM Pool Base: 0x80000000, size: 0x2000, alignment: 0x10
MBEDTLS_CORE ACA driver init success!
E/TC:10 00 tee_otp_get_hw_unique_key:123 Get hw key:
I/TC: Primary CPU switching to normal world boot
INFO: BL31: Preparing for EL3 exit to normal world
INFO: Entry point address = 0x84400000
INFO: SPSR = 0x3c9
[65.387] [UEFI] E3C1 XspiInitDxeStart
[65.388] [UEFI] E400 XspiInitDxeEnd
[65.476] [UEFI] E2C1 PcieInitDxeStart
Root Port 0 Link up fail
Root Port 1 Link up fail
Root Port 2 Link up fail
[65.850] [UEFI] E300 PcieInitDxeEnd
One display device is found on typec port1!
Update Platform Config Param GopDisplayPort=0x1
total 6 modes (current pixel clock 50671, width 2880, height 1800)