NX5: what does I2S1_SDO3 pins used for?

I’m attempting to use NX5 for my car audio DSP, and I sadly found that only three I2S1 output pins were mapped to the 40pin header on official IO board, which are SDO0 (pin 28), SDO1 (pin 27), and two SDO2s (pin 3 and pin 32)

(And if I understood it correctly, is it means I can use either one of pin 3 and pin 32 as SDO2?)

So where is the I2S1 SDO3 used for? I searched on RK3588 datasheet, the I2S1 SDO3 has two choices:

  • CPU pin AL26: CIF_CLKOUT/BT1120_D10/I2S1_SDO3_M0/PCIE30X4_CLKREQN_M1/DP0_HPDIN_M0/SPDIF0_TX_M1/UART9_TX_M1/PWM11_IR_M1/GPIO4_B4_u
  • CPU pin V28: I2S1_SDO3_M1/CPU_BIG1_AVS/I2C1_SDA_M2/CAN2_TX_M1/HDMI_TX0_SCL_M1/SPI3_CS1_M2/SATA_MP_SWITCH/GPIO0_D5_u

How does these two CPU pins used in NX5 IO board? Is it easy to hack the board and the device tree to make I2S1 SDO3 available for me?

In addition, official link to NX5 schematics (https://dl.radxa.com/nx5/radxa_nx5_v1100_schematic.pdf) seems broken…

Thanks!

the schematic link broken issue was fixed just now.

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Thanks for fixing the schematics!!!

After a brief look on it, I found that:

  • CPU I2S1_SDO3_M0 connects to SDMMC_PWREN, which controls DDI0_HPD. Is it only used in DP port? Can I remove whole DP stuff and still leave a usable HDMI?
  • CPU I2S1_SDO3_M1 connects to CHRG_OK_H. In the IO board, it is actually already connected to pin 5 of the 40-pin header, but the official hardware info does not refer any I2S SDO function of that pin. Is it already available on the 40-pin header? Or it is really not available due to some other reason?

Whether or not it is exposed to 40-PIN, you can check here https://docs.radxa.com/en/compute-module/nx5/hardware/hw-interface#40-pin-gpio

Hi @Xi_Yang,
After my checking I2S1_SDO3_M1 is not used for other hardware connections, so theoretically you have a set of four output channels of I2S1_M1 available

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Thanks for a lot! I will try on it as soon as I actually received the IO board, possibly several weeks later. It seems the whole China mainland’s retailers don’t have this IO board on their storage.

Maybe you can review CM5, maybe the inventory of CM5 is rich

I just noticed another problem: seems no I2S1 LRCK officially exposed? So, does the developer team really expects to make I2S1 available on IO board?

I made some extra search on the schematics. Seems I2S1_LRCK_RX_M1 is exposed to SODIMM pin 191, then connected to a MIPI display port; and I2S1_LRCK_TX_M0 is exposed to SODIMM pin 224, then connected to the M.2 port.

So it seems I have to hack the device tree deeper, which is probably be a major challenge to me. Maybe I should try to build a USB UAC using pico2, then connect it to Rock NX.

I was careless too, you’re right, I thought maybe you could use I2S0