ROCK Pi S board. RK3308 SoC.
Technical reference manual part 2 describes the Mobile Storage Host Controller.
SDMMC_PWREN (Power-enable register)
Bit 0: power_enable
Power on/off switch for the card.
Once power is turned on, firmware should wait for
regulator/switch ramp-up time before trying to initialize card.
1'b0: power off
1'b1: power on
Bit values output to card_power_en port
Also,
SDMMC_CMD (Command register)
Bit 15: send_initialization
1'b0: do not send initialization sequence (80 clocks of 1) before
sending this command
1'b1: send initialization sequence before sending this command
After power on, 80 clocks must be sent to card for initialization
before sending any commands to card. Bit should be set while
sending first command to card so that controller will initialize
clocks before sending command to card. This bit should not be
set for either of the boot modes (alternate or mandatory)
My test code runs under the following operating conditions:
Bare matal, AArch64 EL3. DRAM initialized, MMU and GIC disabled.
I assumed that BootROM must properly initialize SDMMC controller because it needs to load PPL/SPL from the memory card. So I skipped SD initialization sequence and just send CMD17 to read a block of data. And the read is successful! The strange thing is SDMMC_PWREN Bit[0] = 0 - power off.
My question: What SDMMC_PWREN register is for and how/when to use it? I tried enabling power by setting SDMMC_PWREN[0] to 1 before sending CMD17. I also tried setting SDMMC_CMD[15] so that 80 clocks initialization delay is sent before executing a command. All this doesn’t seem to make any difference. FIFO gets data for reading even with power disabled and without 80 clocks delay. Why is it so?