Mcp2515 Rock PI S

Is there anyone who managed to bring the CAN bus to life on SPI with an mcp2515?

SPI2 connection:
Main header pin 19 MOSI
Main header pin 21 MISO
Main header pin 23 CLK
Main header pin 24 CS
Main header pin 22 INT

/boot/uEnv.txt:
overlays=rk3308-uart0 rk3308-spi-spidev
param_spidev_spi_bus=2
param_spidev_spi_cs=0
param_spidev_max_freq=1000000

In /dev already created spidev2.0

I tried to define device tree overlay but I can not compile
/boot/dtbs/$(uname -r)/rockchip/overlay/spi2-mcp2515-can0-overlay.dts:

/dts-v1/;
/plugin/;

/ {
compatible = “rockchip,rockpi”,“rockchip,rk3308”;
fragment@0 {
target = <&pinctrl>;
overlay {
mcp2515_int_pin: mcp2515_int_pin {
rockchip,pins = <2 7 0 &pcfg_pull_none>;
};
};
};
fragment@1 {
target-path = “/”;
overlay {
can_mcp2515_osc: can-mcp2515-osc {
compatible = “fixed-clock”;
clock-frequency = <16000000>;
#clock-cells = <0>;
};
};
};

    fragment@2 {
            target = <&uart2>;
            __overlay__ {
                    status = "disabled";
            };
    };

    fragment@3 {
            target = <&spi2>;
            __overlay__ {
                    status = "okay";
                    max-freq = <10000000>;
                    #address-cells = <1>;
                    #size-cells = <0>;
                    can_mcp2515: can-mcp2515@0 {
                            status = "okay";
                            compatible = "microchip,mcp2515";
                            reg = <0>;
                            interrupt-parent = <&gpio2>;
                            interrupts = <7 2>;
                            spi-max-frequency = <10000000>;
                            clocks = <&can_mcp2515_osc>;
                            vdd-supply = <&vcc3v3_sys>;
                            xceiver-supply = <&vcc3v3_sys>;
                            pinctrl-names = "default";
                            pinctrl-0 = <&mcp2515_int_pin>;
                    };
            };
    };

};

cmd: dtc -O dtbo -b 0 -o spi2-mcp2515-can0-overlay.dtbo spi2-mcp2515-can0-overlay.dts
resp:
spi2-mcp2515-can0-overlay.dtbo: Warning (unit_address_vs_reg): Node /fragment@0 has a unit name, but no reg property
spi2-mcp2515-can0-overlay.dtbo: Warning (unit_address_vs_reg): Node /fragment@1 has a unit name, but no reg property
spi2-mcp2515-can0-overlay.dtbo: Warning (unit_address_vs_reg): Node /fragment@2 has a unit name, but no reg property
spi2-mcp2515-can0-overlay.dtbo: Warning (unit_address_vs_reg): Node /fragment@3 has a unit name, but no reg property
dtc: livetree.c:521: get_node_by_phandle: Assertion `(phandle != 0) && (phandle != -1)’ failed.
Aborted

I am stucked here. If you can help please give it a try.

We have brought up MCP2515 on ROCK Pi 4. This is the dts we used. Hope it helps you.

Hi benedek , I have successfully integrated the mcp2515 with rockpi S debian image last week.

I had to recompile the kernel source though in order to enable the mcp2515 driver , because the stock image I had was not canbus enabled.

If you still have problem , let me know, I’ll be happy to share walkthrough.

Cheers

1 Like

Hello Anton,

Thnaks your answer!
I’ll be the happiest if you share the walkthrough.

Disclaimer : please take note that i’m a beginner with Rockpi S and linux kernels / overlays , but I must say that the RockPi documentation regarding recompiling the kernel is solid , and I had no issues with that .

Ok , because the canbus drivers are not by default enabled in my rockpi debian images , it required me to download the 4.4 kernel source for rockpi s , along with a compiler binary package. I then enabled the relevant canbus resources via menuconfig and also created a default mcp2515-can overlay.

I’m using a debian buster virtual machine on my win10 laptop in order to compile the kernel. I addition I use MobaXterm on windows as an SSH client .

I would recommend that you download the stock kernel source and compile it , without making any modifications to the source. Then transfer the resultant deb install packages to your rockpi and install the new kernel via dpkg. The source and instructions are at rockpi_s_kernel_source_and instructions

Note that compiling kernel is a lot of code , and compile time can take some time.

Before updating the kernel binaries on your target , please make an SD backup of your current image.

Let me know if you encounter problems relating to the recompile process.

Good luck. Let me know.

the compiler will also also generate a debug version of the kernel image , this file you do not need to install . That leaves us with the firware deb file , the headers deb file and the images deb file (non-debug), that needs to be installed.

Hi Anton,

Thank you for your helpful answer.

For the rocord would you please share your pin maping and the created mcp2515-can overlay source?
I suspect I will be doing something wrong…

Benedek

Ok , in the kernel source :

  1. I have have added default value for the mcp2515 interrupt pin to file rk3308.dtsi in folder kernel/arch/arm64/boot/dts/rockchip as follows :

can0-pins {
mcp2515_pins: mcp2515-pins {
rockchip,pins =

  			<0 RK_PC1 5 &pcfg_pull_none>;
  	};
  };

};

Note the default interrupt pin is GPIO0_C1 which is header 1 pin 15 .

  1. Next I created the file mcp2515-can.dts in folder kernel/arch/arm64/boot/dts/rockchip/overlays

//
//This devicetree overlay is used for WaveShare RS485 CAN HAT.
//

/dts-v1/;
/plugin/;

/ {
compatible = “rockchip,rockpi”,“rockchip,rk3308”;

fragment@0 {
target = <&pinctrl>;

  __overlay__ {
  	mcp2515_int_pin: mcp2515-pins  {
  	        rockchip,pins = <2 7 0 &pcfg_pull_none>;
  	};
  };		

};

fragment@1 {
target-path = “/”;

  __overlay__ {
  	can_mcp2515_osc: can-mcp2515-osc {
  		compatible = "fixed-clock";
  		clock-frequency = <12000000>;
  		#clock-cells = <0>;
  	};
  };

};

fragment@2 {
target = <&spi2>;

  __overlay__ {
  	status = "okay";
  	max-freq = <10000000>;
  	#address-cells = <1>;
  	#size-cells = <0>;

  	can_mcp2515: can-mcp2515@0 {
  		status = "okay";
  		compatible = "microchip,mcp2515";
  		reg = <0>;
  		interrupt-parent = <&gpio2>;
  		interrupts = <7 2>;
  		spi-max-frequency = <10000000>;
  		clocks = <&can_mcp2515_osc>;
  		//vdd-supply = <&vcc3v3_sys>;
  		//xceiver-supply = <&vcc3v3_sys>;
  		pinctrl-names = "default";
  		pinctrl-0 = <&mcp2515_int_pin>;
  	};
  };

};
};

Note that here I have overlayed the interrupt pin to bind to GPIO2_A7 (gpio header 1 pin 22) .

In order for the compiler to compile the new dts file , I added mcp2515-can.dtbo in the makefile in the same folder.

Note : make sure you match exactly the mcp2515 clock frequency (not the spi frequency) . In my case the waveshare can hat has a 12Mhz crystal , therefore my value is 120000 (can-mcp2515-osc fragment).

Cheers.

After deploying to target , and adding mcp2515-can to the uEvt.txt , I get the following , indicating that my overlay has been honoured :

rock@rockpis:~$ dmesg | grep mcp25

[ 0.097168] device: ‘can-mcp2515-osc’: device_add
[ 0.097198] bus: ‘platform’: add device can-mcp2515-osc
[ 0.097273] PM: Adding info for platform:can-mcp2515-osc
[ 0.693579] bus: ‘spi’: add driver mcp251x
[ 0.693607] bus: ‘spi’: driver_probe_device: matched device spi2.0 with driver mcp251x
[ 0.693622] bus: ‘spi’: really_probe: probing driver mcp251x with device spi2.0
[ 0.693881] mcp251x spi2.0: no init pinctrl state
[ 0.693910] mcp251x spi2.0: no sleep pinctrl state
[ 0.693924] mcp251x spi2.0: no idle pinctrl state
[ 0.704220] mcp251x spi2.0: CANCTRL 0x87
[ 0.704956] driver: ‘mcp251x’: driver_bound: bound to device ‘spi2.0’
[ 0.704975] bus: ‘spi’: really_probe: bound device spi2.0 to driver mcp251x
[ 4.318190] mcp251x spi2.0: CNF: 0x00 0xa3 0x01
rock@rockpis:~$

Also , here is confirmation that the pins are instantiated :

rock@rockpis:~$ ls /sys/firmware/devicetree/base/pinctrl/can0-pins/
mcp2515-pins name
rock@rockpis:~$

of course , if you need to make new changes to mcp2515-can.dts you can merely copy the dts to the target and recompile the overlay file there , then copy the mcp2515-can.dtbo binary to /boot/dtbs/4.4.143-999-rockchip-g01bbbc5d1312/rockchip/overlay/ folder .

Awesome work. Thank you.