Mcp2515 Rock PI S

benedek · December 23, 2021, 6:56pm

Is there anyone who managed to bring the CAN bus to life on SPI with an mcp2515?

SPI2 connection:
Main header pin 19 MOSI
Main header pin 21 MISO
Main header pin 23 CLK
Main header pin 24 CS
Main header pin 22 INT

/boot/uEnv.txt:
overlays=rk3308-uart0 rk3308-spi-spidev
param_spidev_spi_bus=2
param_spidev_spi_cs=0
param_spidev_max_freq=1000000

In /dev already created spidev2.0

I tried to define device tree overlay but I can not compile
/boot/dtbs/$(uname -r)/rockchip/overlay/spi2-mcp2515-can0-overlay.dts:

/dts-v1/;
/plugin/;

/ {
compatible = “rockchip,rockpi”,“rockchip,rk3308”;
fragment@0 {
target = <&pinctrl>;
overlay {
mcp2515_int_pin: mcp2515_int_pin {
rockchip,pins = <2 7 0 &pcfg_pull_none>;
};
};
};
fragment@1 {
target-path = “/”;
overlay {
can_mcp2515_osc: can-mcp2515-osc {
compatible = “fixed-clock”;
clock-frequency = <16000000>;
#clock-cells = <0>;
};
};
};

    fragment@2 {
            target = <&uart2>;
            __overlay__ {
                    status = "disabled";
            };
    };

    fragment@3 {
            target = <&spi2>;
            __overlay__ {
                    status = "okay";
                    max-freq = <10000000>;
                    #address-cells = <1>;
                    #size-cells = <0>;
                    can_mcp2515: can-mcp2515@0 {
                            status = "okay";
                            compatible = "microchip,mcp2515";
                            reg = <0>;
                            interrupt-parent = <&gpio2>;
                            interrupts = <7 2>;
                            spi-max-frequency = <10000000>;
                            clocks = <&can_mcp2515_osc>;
                            vdd-supply = <&vcc3v3_sys>;
                            xceiver-supply = <&vcc3v3_sys>;
                            pinctrl-names = "default";
                            pinctrl-0 = <&mcp2515_int_pin>;
                    };
            };
    };

};

cmd: dtc -O dtbo -b 0 -o spi2-mcp2515-can0-overlay.dtbo spi2-mcp2515-can0-overlay.dts
resp:
spi2-mcp2515-can0-overlay.dtbo: Warning (unit_address_vs_reg): Node /fragment@0 has a unit name, but no reg property
spi2-mcp2515-can0-overlay.dtbo: Warning (unit_address_vs_reg): Node /fragment@1 has a unit name, but no reg property
spi2-mcp2515-can0-overlay.dtbo: Warning (unit_address_vs_reg): Node /fragment@2 has a unit name, but no reg property
spi2-mcp2515-can0-overlay.dtbo: Warning (unit_address_vs_reg): Node /fragment@3 has a unit name, but no reg property
dtc: livetree.c:521: get_node_by_phandle: Assertion `(phandle != 0) && (phandle != -1)’ failed.
Aborted

I am stucked here. If you can help please give it a try.

Stephen · December 27, 2021, 10:17am

We have brought up MCP2515 on ROCK Pi 4. This is the dts we used. Hope it helps you.

Antonr · January 7, 2022, 7:01am

Hi benedek , I have successfully integrated the mcp2515 with rockpi S debian image last week.

I had to recompile the kernel source though in order to enable the mcp2515 driver , because the stock image I had was not canbus enabled.

If you still have problem , let me know, I’ll be happy to share walkthrough.

Cheers

benedek · January 8, 2022, 4:06pm

Hello Anton,

Thnaks your answer!
I’ll be the happiest if you share the walkthrough.

Antonr · January 9, 2022, 8:29am

Disclaimer : please take note that i’m a beginner with Rockpi S and linux kernels / overlays , but I must say that the RockPi documentation regarding recompiling the kernel is solid , and I had no issues with that .

Ok , because the canbus drivers are not by default enabled in my rockpi debian images , it required me to download the 4.4 kernel source for rockpi s , along with a compiler binary package. I then enabled the relevant canbus resources via menuconfig and also created a default mcp2515-can overlay.

I’m using a debian buster virtual machine on my win10 laptop in order to compile the kernel. I addition I use MobaXterm on windows as an SSH client .

I would recommend that you download the stock kernel source and compile it , without making any modifications to the source. Then transfer the resultant deb install packages to your rockpi and install the new kernel via dpkg. The source and instructions are at rockpi_s_kernel_source_and instructions

Note that compiling kernel is a lot of code , and compile time can take some time.

Before updating the kernel binaries on your target , please make an SD backup of your current image.

Let me know if you encounter problems relating to the recompile process.

Good luck. Let me know.

Antonr · January 9, 2022, 8:33am

the compiler will also also generate a debug version of the kernel image , this file you do not need to install . That leaves us with the firware deb file , the headers deb file and the images deb file (non-debug), that needs to be installed.

benedek · January 9, 2022, 9:45am

Hi Anton,

Thank you for your helpful answer.

For the rocord would you please share your pin maping and the created mcp2515-can overlay source?
I suspect I will be doing something wrong…

Antonr · January 9, 2022, 4:36pm

Benedek

Ok , in the kernel source :

I have have added default value for the mcp2515 interrupt pin to file rk3308.dtsi in folder kernel/arch/arm64/boot/dts/rockchip as follows :

can0-pins {
mcp2515_pins: mcp2515-pins {
rockchip,pins =
  			<0 RK_PC1 5 &pcfg_pull_none>;
  	};
  };
};

Note the default interrupt pin is GPIO0_C1 which is header 1 pin 15 .

Next I created the file mcp2515-can.dts in folder kernel/arch/arm64/boot/dts/rockchip/overlays

//
//This devicetree overlay is used for WaveShare RS485 CAN HAT.
//

/dts-v1/;
/plugin/;

/ {
compatible = “rockchip,rockpi”,“rockchip,rk3308”;

fragment@0 {
target = <&pinctrl>;

  __overlay__ {
  	mcp2515_int_pin: mcp2515-pins  {
  	        rockchip,pins = <2 7 0 &pcfg_pull_none>;
  	};
  };

};

fragment@1 {
target-path = “/”;

  __overlay__ {
  	can_mcp2515_osc: can-mcp2515-osc {
  		compatible = "fixed-clock";
  		clock-frequency = <12000000>;
  		#clock-cells = <0>;
  	};
  };

};

fragment@2 {
target = <&spi2>;

  __overlay__ {
  	status = "okay";
  	max-freq = <10000000>;
  	#address-cells = <1>;
  	#size-cells = <0>;

  	can_mcp2515: can-mcp2515@0 {
  		status = "okay";
  		compatible = "microchip,mcp2515";
  		reg = <0>;
  		interrupt-parent = <&gpio2>;
  		interrupts = <7 2>;
  		spi-max-frequency = <10000000>;
  		clocks = <&can_mcp2515_osc>;
  		//vdd-supply = <&vcc3v3_sys>;
  		//xceiver-supply = <&vcc3v3_sys>;
  		pinctrl-names = "default";
  		pinctrl-0 = <&mcp2515_int_pin>;
  	};
  };

};
};

Note that here I have overlayed the interrupt pin to bind to GPIO2_A7 (gpio header 1 pin 22) .

In order for the compiler to compile the new dts file , I added mcp2515-can.dtbo in the makefile in the same folder.

Note : make sure you match exactly the mcp2515 clock frequency (not the spi frequency) . In my case the waveshare can hat has a 12Mhz crystal , therefore my value is 120000 (can-mcp2515-osc fragment).

Cheers.

Antonr · January 9, 2022, 4:55pm

After deploying to target , and adding mcp2515-can to the uEvt.txt , I get the following , indicating that my overlay has been honoured :

rock@rockpis:~$ dmesg | grep mcp25

[ 0.097168] device: ‘can-mcp2515-osc’: device_add
[ 0.097198] bus: ‘platform’: add device can-mcp2515-osc
[ 0.097273] PM: Adding info for platform:can-mcp2515-osc
[ 0.693579] bus: ‘spi’: add driver mcp251x
[ 0.693607] bus: ‘spi’: driver_probe_device: matched device spi2.0 with driver mcp251x
[ 0.693622] bus: ‘spi’: really_probe: probing driver mcp251x with device spi2.0
[ 0.693881] mcp251x spi2.0: no init pinctrl state
[ 0.693910] mcp251x spi2.0: no sleep pinctrl state
[ 0.693924] mcp251x spi2.0: no idle pinctrl state
[ 0.704220] mcp251x spi2.0: CANCTRL 0x87
[ 0.704956] driver: ‘mcp251x’: driver_bound: bound to device ‘spi2.0’
[ 0.704975] bus: ‘spi’: really_probe: bound device spi2.0 to driver mcp251x
[ 4.318190] mcp251x spi2.0: CNF: 0x00 0xa3 0x01
rock@rockpis:~$

Also , here is confirmation that the pins are instantiated :

rock@rockpis:~$ ls /sys/firmware/devicetree/base/pinctrl/can0-pins/
mcp2515-pins name
rock@rockpis:~$

Antonr · January 9, 2022, 5:04pm

of course , if you need to make new changes to mcp2515-can.dts you can merely copy the dts to the target and recompile the overlay file there , then copy the mcp2515-can.dtbo binary to /boot/dtbs/4.4.143-999-rockchip-g01bbbc5d1312/rockchip/overlay/ folder .

benedek · January 9, 2022, 7:42pm

Awesome work. Thank you.

Engeen · February 1, 2022, 12:48pm

Nice you got it to work! Can you please help me getting mine up and running as well? We want to use the RockPi to log data from the can bus and upload it to a server. And later connect a camera and depending on the location of a QR code drive motors to align the vehicle with an object.

I’m using the RockPi 4A. Output of uname -a
Linux 31683225848 4.4.154-115-rockchip-g00fccd37c63c #1 SMP Wed Sep 15 15:04:24 UTC 2021 aarch64 aarch64 aarch64 GNU/Linux

Output of dmesg | grep mcp

[ 5.776629] rockchip-pinctrl pinctrl: unable to find group for node mcp2515_int_pin
[ 5.777617] mcp251x spi32766.0: Looking up vdd-supply from device tree
[ 5.777851] mcp251x spi32766.0: Looking up xceiver-supply from device tree
[ 5.788241] mcp251x spi32766.0: CANCTRL 0x87
[ 863.762038] mcp251x spi32766.0: CNF: 0x00 0x92 0x02

The device is there in ifconfig, but after doing:
ip link set can0 type can bitrate 1000000
ip link set up can0
ifconfig can0 up

ifconfig can0 says:

can0: flags=193<UP,RUNNING,NOARP> mtu 16
unspec 00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00 txqueuelen 10 (UNSPEC)
RX packets 0 bytes 0 (0.0 B)
RX errors 0 dropped 0 overruns 0 frame 0
TX packets 0 bytes 0 (0.0 B)
TX errors 0 dropped 0 overruns 0 carrier 0 collisions 0

But candump can0 gives nothing. (And I’m sure I have my wiring correct because with my former Raspberry Pi I do get output with candump).

I downloaded the kernel source, adjusted the clock-frequency to 20 MHz in the dts file, compiled just that and moved the file to boot. It does start up but I probably don’t have my pins set right. And I don’t understand the numbers used in the dts file. I tried to correlate with https://wiki.radxa.com/Rockpi4/hardware/gpio but can you please explain?

I’m using the same pins as @benedek:

Main header pin 19 MOSI
Main header pin 21 MISO
Main header pin 23 CLK
Main header pin 24 CS
Main header pin 22 INT

And in my case I guess it’s spi1.

I did not touch rk3308.dtsi either, is this mandatory? Can this be done without compiling the whole kernel?

benedek · February 11, 2022, 2:20pm

Dear Antonr!

I have tried lot of things, dmesg | grep mcp25 doesn’t show anything.
Did you make any changes to kernel build? I mean menuconfig or different make command to build deb packages?
Would you share your uEnv.txt?

My rk3308.dtsi changes works:
ls /sys/firmware/devicetree/base/pinctrl/can0-pins/
mcp2515-pins name

rock@rockpis:/boot/dtbs/4.4.143-1000-rockchip-g01bbbc5d1312/rockchip/overlay$ ls -l
total 74
-rwxr-xr-x 1 root root 4629 Feb 11 12:46 README.rockchip-overlays
-rwxr-xr-x 1 root root 1290 Feb 11 12:46 i2c1-hym8563.dtbo
-rwxr-xr-x 1 root root 1543 Feb 11 12:46 mcp2515-can.dtbo
-rwxr-xr-x 1 root root 546 Feb 11 12:46 rk3308-console-on-uart0.dtbo
-rwxr-xr-x 1 root root 788 Feb 11 12:46 rk3308-console-on-uart1.dtbo
-rwxr-xr-x 1 root root 669 Feb 11 12:46 rk3308-console-on-uart2.dtbo
-rwxr-xr-x 1 root root 505 Feb 11 12:46 rk3308-i2c0.dtbo
-rwxr-xr-x 1 root root 262 Feb 11 12:46 rk3308-i2c1.dtbo
-rwxr-xr-x 1 root root 383 Feb 11 12:46 rk3308-i2c2.dtbo
-rwxr-xr-x 1 root root 624 Feb 11 12:46 rk3308-i2c3-m0.dtbo
-rwxr-xr-x 1 root root 624 Feb 11 12:46 rk3308-i2c3-m1.dtbo
-rwxr-xr-x 1 root root 504 Feb 11 12:46 rk3308-i2c3.dtbo
-rwxr-xr-x 1 root root 262 Feb 11 12:46 rk3308-pwm1.dtbo
-rwxr-xr-x 1 root root 383 Feb 11 12:46 rk3308-pwm2.dtbo
-rwxr-xr-x 1 root root 383 Feb 11 12:46 rk3308-pwm3.dtbo
-rwxr-xr-x 1 root root 881 Feb 11 12:46 rk3308-spi-spidev.dtbo
-rwxr-xr-x 1 root root 382 Feb 11 12:46 rk3308-uart0.dtbo
-rwxr-xr-x 1 root root 624 Feb 11 12:46 rk3308-uart1.dtbo
-rwxr-xr-x 1 root root 384 Feb 11 12:46 rk3308-uart2.dtbo
-rwxr-xr-x 1 root root 624 Feb 11 12:46 rk3308-uart3.dtbo
-rwxr-xr-x 1 root root 295 Feb 11 12:46 rk3308-usb20-host.dtbo
-rwxr-xr-x 1 root root 491 Feb 11 12:46 rk3308-w1-gpio.dtbo
-rwxr-xr-x 1 root root 1814 Feb 11 12:46 rockchip-fixup.scr
-rwxr-xr-x 1 root root 2358 Feb 11 12:46 rockpis-dmic-8ch-pdm.dtbo
-rwxr-xr-x 1 root root 963 Feb 11 12:46 rockpis-i2s-out.dtbo
-rwxr-xr-x 1 root root 966 Feb 11 12:46 rockpis-spdif-out.dtbo
-rwxr-xr-x 1 root root 2480 Feb 11 12:46 rockpis-v11-spi2-waveshare35b-v2.dtbo
-rwxr-xr-x 1 root root 2512 Feb 11 12:46 rockpis-v11-spi2-waveshare35c.dtbo
-rwxr-xr-x 1 root root 2480 Feb 11 12:46 rockpis-v12-spi2-waveshare35b-v2.dtbo
-rwxr-xr-x 1 root root 2512 Feb 11 12:46 rockpis-v12-spi2-waveshare35c.dtbo

rock@rockpis:/boot$ cat uEnv.txt
verbosity=7
fdtfile=rockchip/rk3308-rock-pi-s.dtb
console=ttyS0,1500000n8
overlays=rk3308-uart0 mcp2515-can
param_spidev_spi_bus=2
param_spidev_spi_cs=0
rootuuid=e6cc3977-ae0c-4340-9b51-66197ebac83d
initrdsize=0x62d5f6
kernelversion=4.4.143-1000-rockchip-g01bbbc5d1312
initrdimg=initrd.img-4.4.143-1000-rockchip-g01bbbc5d1312
kernelimg=vmlinuz-4.4.143-1000-rockchip-g01bbbc5d1312

We also tried to add rk3308-spi-spidev overlay to uEnv.txt

benedek · February 18, 2022, 5:17pm

In my case can bitrate 100k.
I got the same output when I add wrong bitrate.
Try to use can-utils → candump and cangen
Rock PI 4 mcp2515(spi1) dtoverlay:

Engeen · February 19, 2022, 12:39am

Thank you so much for everything you tried! Actually about an hour before you sent your last message I got it working. I checked again with my RaspPi but found out that worked only with a different (custom) shield. So there was a problem in the hand soldering of one of the chips. After that candump can0 on the RockPi started bursting with packages.

I’m not sure yet which of the adjustments were needed now, I guess recompiling the spi1-mcp2515-can0 overlay mentioned by @Stephen (and like you reference to github) with the right bitrate was enough. But I’ll have to double check that by starting from scratch.

Since I’m using the RockPi 4 I altered rk3399.dtsi instead to add the default pin like you recommended. But I don’t know now wether this is actually needed.

I did change some things in menuconfig, but I didn’t succeed in building a kernel. So just running the kernel as provided in the image.

On Monday I’ll have access to the machine again. Then I can try all these things and provide the uEnv.txt equivalent for the RockPi 4. I did disable the uart that share the same pins.

Once again, thank you for the effort and replies! Hardware wise this is a beautiful Single Board PC, but community support is very much needed! Let’s make this board more and more accessible!

Engeen · February 21, 2022, 2:01pm

The contents of hw_intrc.conf on my RockPi 4A:

$ cat /boot/hw_intfc.conf
intfc:pwm0=off
intfc:pwm1=off
intfc:uart2=on
intfc:uart4=off
intfc:spi1=on
intfc:spi2=off
intfc:i2c2=off
intfc:i2c6=off
intfc:i2c7=on

# can function of waveshare rs485 can hat on SPI1. Need set: intfc:uart4=off intfc:spi1=on
intfc:dtoverlay=spi1-mcp2515-can0

And I can confirm that this is the only dts that I built and compiled: arch/arm64/boot/dts/rockchip/overlays-rockpi4/spi1-mcp2515-can0-overlay.dts

//This devicetree overlay is used for RS485 CAN HAT.
/dts-v1/;
/plugin/;

/ {
        compatible = "rockchip,rockpi","rockchip,rk3399";

        fragment@0 {
                target = <&pinctrl>;

                __overlay__ {
                        mcp2515_int_pin: mcp2515-pins {
                                rockchip,pins = <4 29 0 &pcfg_pull_none>;
                        };
                };
        };

        fragment@1 {
                target-path = "/";

                __overlay__ {
                        can_mcp2515_osc: can-mcp2515-osc {
                                compatible = "fixed-clock";
                                clock-frequency = <20000000>;
                                #clock-cells = <0>;
                        };
                };
        };

        fragment@2 {
                target = <&spi1>;

                __overlay__ {
                        status = "okay";
                        max-freq = <10000000>;
                        #address-cells = <1>;
                        #size-cells = <0>;

                        can_mcp2515: can-mcp2515@0 {
                                status = "okay";
                                compatible = "microchip,mcp2515";
                                reg = <0>;
                                interrupt-parent = <&gpio4>;
                                interrupts = <29 2>;
                                spi-max-frequency = <10000000>;
                                clocks = <&can_mcp2515_osc>;
                                vdd-supply = <&vcc3v3_sys>;
                                xceiver-supply = <&vcc3v3_sys>;
                                pinctrl-names = "default";
                                pinctrl-0 = <&mcp2515_int_pin>;
                        };
                };
        };
};

dmesg is still complaining about a group:

$ dmesg | grep mcp
[ 6.031579] rockchip-pinctrl pinctrl: unable to find group for node mcp2515-pins
[ 6.032562] mcp251x spi1.0: Looking up vdd-supply from device tree
[ 6.032839] mcp251x spi1.0: Looking up xceiver-supply from device tree
[ 6.043643] mcp251x spi1.0: CANCTRL 0x87

But it works!

hellpower · May 18, 2022, 6:29am

Thank you for this thread, it is really interesting how to create the overlay file.
I tried this on the rock PI E and it doesnt work. After loading my overlay file i got an error and the kernel stops.

I know how to configure existing overlayfiles, but creating or changing overlays file are far away from me at the moment.
if anybody have a suggestion, i would be happy.

mike.

Bharadwaaj_Ramakrish · February 18, 2023, 10:27am

Did someone try using MCP2518FD with Rock PI S. It would be great if someone did.