CoreELEC is now running on Radxa Zero
Introduce the Radxa Zero
3 Likes
Hi guys, I already make 2 quick videos about this amazing new board!!
this will be an amazing rockpi family
3 Likes
That was fast.
Please share link to Mainline uboot. @SleepWalker have already recieved it and want to prepare a uboot to be used with freebsd.
1 Like
Also thanks to the work by the CoreELEC team, EmuELEC is also working on the Radxa Zero, and I must say I am very impressed by this device considering the size.
I will release a testing img very soon for those that want to try it.
1 Like
For a while I have thought the Pi Zero is show its age and microcontrollers have become valid alternatives.
So the Raspberry Pi3A+ has been my fave SBC for a while but looks like especially with the Mali-G31 GPU with quad A53 but on a zero format 7 price.
Yeah wow that is looking a better product and eager to find out what overlays are available especially with I2S.
For price looks amazing and also the quad A53 from Pi experience is still a really good embedded fit.
I want one! 
PS does that thing also have a spare pcie lane?
Also I was pleasantly surprised but just few options as always surprises me how many options radxa often provide. They seem to be well chosen and well priced.
I was thinking I want 2gb no emmc but with some thought not needing a SD card with Wifi/BT5 the 8gb emmc is so well priced that 2gb no emmc is prob pointless.
Its a crazy small board but if it could have a M.2 or maybe a Zero-m.2 board could be created as it would be really interesting to use a Coral Ai m.2 as even the Pi CM4 can not as the nature of VC6 & the PCIe controller has problems where only very simple cards & ssd work.
Then again with https://github.com/ARM-software/armnn it will be at least interesting what sort of acceleration the mali could provide with tensorflow and the Radxa zero has advantages over the Pi3 never mind Zero
when building the mainline u-boot on the aarch64 architecture, instead of aml_encrypt_g12a, use the meson64-tools project, I did not conduct full testing (there is no board with a processor from amlogic) but this recommendation was from the issues.
1 Like
I presume much can be grabbed from other existing s905XXX SBC?
https://wiki.odroid.com/odroid-c2/odroid-c2
I got that from elinux.org as are there any others apart from the usual goodies from https://docs.armbian.com/ ?
https://www.armbian.com/khadas-vim1/
https://www.armbian.com/odroid-c2/
https://www.armbian.com/lepotato/
https://www.armbian.com/nanopi-k2/
I am struggling to find a specific datasheet for the s905y2 which presume is pretty much the same as a s905x2 minus ethernet.
From what I can gather it has x8 channels I2S in /out and hopefully is picked up as a codec if enabled.
The SoC for cost has extremely strong video and multimedia capability and brings up seem interesting options in gadget mode especially for x8 channels in.
I am hoping we don’t play gpio musical chairs through revisions and often wonder about the validity and density of a 40pin that is likely not Pi compatible.
I don’t think that matters that much but why even have that format where more dense ribbon connectors prob could connect to 40 pin gpio board(s) that could give a choice of mux setups.
I am not sure what that tiny board constraints are but by adding up probable pads 40 pin even on a small board isn’t going to fit?
https://linux-meson.com/doku.php is a great source of info @jack but do you have a specific soc datasheet and is anyone starting on a wiki (radxa or community)?
Great! In terms of specifications: in the Reference Manual I found
"SDSC/SDHC/SDXC card and SDIO interface with 1-bit and 4-bit data bus width supporting spec version 2.x/3.x/4.x DS/HS modes up to UHS-I SDR104 "
Which implies that, in combination with the usb c, usb 3.0; 5 Gb/s, theoretical maximum copy speeds from an UHS-1 SD card to an USB-c onnected SSD could reach speeds of 104 MB/s?
That would be ideal for my application, any idea when this amazing board will become available ?
Supposedly its UHS mode compliant unlike the Pi SD card.
There is a small amount of stock on allnet.china that devs can work on as a 1st revision.
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Believe me. You don’t need an RJ45 port! Because it’s Zero!) It has WiFi AC (802.11) and this speed is enough for work, videos and a little part of online games.
The second reason why there will never be an RJ45 is the form factor (size). There is not even a USB-A here, because technically USB-C is more compact and technologically advanced.
PS:// USB-Ethernet adapter can help you.
RJ45? True it doesn’t but where did I mention or anyone that?
I was thinking a same format usb 3.0 hub could be cool as an accessory though.
I don’t really think of the Radxa Zero in terms of the Pi Zero as the Pi Zero for me as an application SBC just didn’t have enough Ooomf even though I have a few.
I think the best products Pi do are the Pi3A+ & Pi4 2gb and the Radxa Zero is really interesting as it sits between the two.
So yeah RJ45 is no problem as a USB Gbe or USB cam module are all easy additions but why bother if you have WiFi or even gadget mode networking.
Turned up and emu-elec and retro gaming really isn’t my thing but for some reason when the above turned up in my notifications and with the advent of the Radxa Zero I have been wondering if there is a case with joypad pcbs.
A ‘builders’ modular retro console might be fun and interesting @shanti can you hack and reuse old consoles or get modular parts?
I think I will have a view of that vid and see what they think as might have a go at this
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I am sure its possible, but can I do it personally? I wish I could but no, sorry
@stuartiannaylor apparently not… I just got an email back from Tom (tom@radxa.com), which i asked the same question, he replied:
“Currently Radxa Zero doesn’t support UHS sdcard. We plan to add the support for next hw revision but might be not possible since the board size is too small.”
I have already ordered a 2GB version, so I am curious how fast the current trasfer speeds might be from the uSD card slot. Once I receive the Zero, I will test this and also test the transfer speed with a usb-c to usb 3.0 dongel hub, connected to UHS-I sd card reader and SSD.
Strange though, that the specification sheet already states “supporting spec version 2.x/3.x/4.x
DS/HS modes up to UHS-I SDR104” . @jack do you possibly have more information about this ?
I read that as well.
I think these initial samples are just that as my 512mb (wanted as near Pi zero just to test) didn’t go that well as can not seem to boot.
The chipset on paper looks awesome so hopefully with a revision and also because its actually more between a Pi3 & Pi4 than zero level a bigger Pi3A+ type board would be no bother to me.
PS as for modular it seems a whole cottage industry of 3rd party parts for nintendo switch joy-con has turned up that give an interesting selection of premade parts.
2 Likes
你好，有方便国内下载TwisterOS和Manjaro这两个镜像的地址吗？
Googledrive a no go haimu?
If you msg me will upload it for you somewhere?
Hi @jack,
first of all thanks for the images! However I ran into some problems getting them to boot up.
- I tried both your TwisterOS images on SD and on eMMC but no luck in booting them up, the screen powers on but stays blank for both images
- Before flashing I was erasing the Android image as described here: https://github.com/radxa/documentation/tree/master/rs102
- Then I used etcher to flash the image on eMMC and I also tried SD
- On the other hand I can boot EmuELEC just fine from eMMC
I connected to the UART and attached the bootup messages for the Manjaro image via booting from eMMC.
UART Boot Messages Manjaro Image eMMC
<\0><\0>G12A:BL:0253b8:61aa2d;FEAT:E0F83180:2000;POC:F;RCY:0;EMMC:0;READ:0;CHK:1F;READ:0;CHK:1F;READ:0;0.0<27>bl2_stage_init 0x01
bl2_stage_init 0x81
hw id: 0x0001 - pwm id 0x00
bl2_stage_init 0xc0
bl2_stage_init 0x02
L0:00000000
L1:00000703
L2:00008067
L3:04000000
S1:00000000
B2:00002000
B1:e0f83180
TE: 202660
BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
Board ID = 2
Set cpu clk to 24M
Set clk81 to 24M
CPU clk: 1200 MHz
Set clk81 to 166.6M
eMMC boot @ 2
sw8 s
DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
board id: 2
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 2
fw parse done
Load ddrfw from eMMC, src: 0x00060200, des: 0xfffd0000, size: 0x0000c000, part: 2
Load ddrfw from eMMC, src: 0x00038200, des: 0xfffd0000, size: 0x00004000, part: 2
PIEI prepare done
fastboot data load
00000000
emmc switch 0 ok
00000000
emmc switch 1 ok
ddr saved addr:00016000
Load ddr parameter from eMMC, src: 0x02c00000, des: 0xfffd0000, size: 0x00001000, part: 0
00000000
emmc switch 0 ok
fastboot data verify
verify result: 267
Cfg max: 5, cur: 1. Board id: 255. Force loop cfg
DDR4 probe
ddr clk to 792MHz
Load ddrfw from eMMC, src: 0x00014200, des: 0xfffd0000, size: 0x0000c000, part: 2
00000000
emmc switch 2 ok
dmc_version 0000
Check phy result
INFO : End of initialization
INFO : End of read enable training
INFO : End of fine write leveling
INFO : ERROR : Training has failed!
1D training failed
Cfg max: 5, cur: 2. Board id: 255. Force loop cfg
DDR3 probe
ddr clk to 792MHz
Load ddrfw from eMMC, src: 0x0002c200, des: 0xfffd0000, size: 0x0000c000, part: 2
dmc_version 0000
Check phy result
INFO : End of initialization
INFO : ERROR : Training has failed!
1D training failed
Cfg max: 5, cur: 3. Board id: 255. Force loop cfg
LPDDR4 probe
ddr clk to 792MHz
Load ddrfw from eMMC, src: 0x0003c200, des: 0xfffd0000, size: 0x0000c000, part: 2
dmc_version 0000
Check phy result
INFO : End of CA training
INFO : End of initialization
INFO : Training has run successfully!
Check phy result
INFO : End of initialization
INFO : End of read enable training
INFO : End of fine write leveling
INFO : End of Write leveling coarse delay
INFO : Training has run successfully!
Check phy result
INFO : End of initialization
INFO : End of read dq deskew training
INFO : End of MPR read delay center optimization
INFO : End of write delay center optimization
INFO : End of read delay center optimization
INFO : End of max read latency training
INFO : Training has run successfully!
1D training succeed
Load ddrfw from eMMC, src: 0x00048200, des: 0xfffd0000, size: 0x0000c000, part: 2
Check phy result
INFO : End of initialization
INFO : End of 2D read delay Voltage center optimization
INFO : End of 2D read delay Voltage center optimization
INFO : End of 2D write delay Voltage center optimization
INFO : End of 2D write delay Voltage center optimization
INFO : Training has run successfully!
channel==0
RxClkDly_Margin_A0==236 ps 12
TxDqDly_Margin_A0==236 ps 12
RxClkDly_Margin_A1==236 ps 12
TxDqDly_Margin_A1==236 ps 12
TrainedVREFDQ_A0==74
TrainedVREFDQ_A1==74
VrefDac_Margin_A0==32
DeviceVref_Margin_A0==40
VrefDac_Margin_A1==31
DeviceVref_Margin_A1==40
channel==1
RxClkDly_Margin_A0==236 ps 12
TxDqDly_Margin_A0==236 ps 12
RxClkDly_Margin_A1==256 ps 13
TxDqDly_Margin_A1==236 ps 12
TrainedVREFDQ_A0==74
TrainedVREFDQ_A1==74
VrefDac_Margin_A0==31
DeviceVref_Margin_A0==40
VrefDac_Margin_A1==32
DeviceVref_Margin_A1==40
dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
soc_vref_reg_value 0x 0000001b 0000001b 0000001b 0000001a 0000001a 0000001c 0000001c 0000001b 00000019 0000001b 0000001b 0000001b 0000001d 0000001e 0000001c 0000001d 0000001a 0000001a 0000001b 0000001a 00000019 0000001d 0000001b 0000001d 0000001c 0000001c 0000001a 0000001c 0000001d 00000019 0000001b 0000001a dram_vref_reg_value 0x 00000058
2D training succeed
aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:53:31
auto size-- 65535DDR cs0 size: 1024MB
DDR cs1 size: 1024MB
DMC_DDR_CTRL: 00e0001bDDR size: 2048MB
cs0 DataBus test pass
cs1 DataBus test pass
cs0 AddrBus test pass
cs1 AddrBus test pass
100bdlr_step_size ps== 460
result report
boot times 0Enable ddr reg access
00000000
emmc switch 3 ok
Authentication key not yet programmed
get rpmb counter error 0x00000007
00000000
emmc switch 2 ok
Load FIP HDR from eMMC, src: 0x00010200, des: 0x01700000, size: 0x00004000, part: 2
Load BL3X from eMMC, src: 0x00078200, des: 0x01768000, size: 0x000c4000, part: 2
bl2z: ptr: 05129330, size: 00001e40
0.0;M3 CHK:0;cm4_sp_mode 0MVN_1=0x00000000MVN_2=0x00000000[Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]OPS=0x30ring efuse init28 0b 30 00 01 32 10 00 00 14 35 39 53 42 56 50 [0.017150 Inits done]secure task start!
high task start!
low task start!
run into bl31
NOTICE: BL31: v1.3(release):4fc40b1
NOTICE: BL31: Built : 15:57:33, May 22 2019
NOTICE: BL31: G12A normal boot!
NOTICE: BL31: BL33 decompress pass
ERROR: Error initializing runtime service opteed_fast
U-Boot 2015.01-g0503fbb (Jun 10 2021 - 01:54:21)
DRAM: 2 GiB
Relocation Offset is: 76e64000
spi_post_bind(spifc): req_seq = 0
register usb cfg[0][1] = 0000000077f3f4f0
NAND: get_sys_clk_rate_mtd() 290, clock setting 200!
NAND device id: 0 ff ff ff ff ff
No NAND device found!!!
nand init failed: -6
get_sys_clk_rate_mtd() 290, clock setting 200!
NAND device id: 0 ff ff ff ff ff
No NAND device found!!!
nand init failed: -6
MMC: aml_priv->desc_buf = 0x0000000073e54a70
aml_priv->desc_buf = 0x0000000073e56db0
SDIO Port B: 0, SDIO Port C: 1
co-phase 0x3, tx-dly 0, clock 400000
co-phase 0x3, tx-dly 0, clock 400000
co-phase 0x3, tx-dly 0, clock 400000
emmc/sd response timeout, cmd8, status=0x1ff2800
emmc/sd response timeout, cmd55, status=0x1ff2800
co-phase 0x3, tx-dly 0, clock 400000
co-phase 0x3, tx-dly 0, clock 40000000
aml_sd_retry_refix[983]:delay = 0x0,gadjust =0x182000
[mmc_startup] mmc refix success
init_part() 282: PART_TYPE_DOS
[mmc_init] mmc init success
start dts,buffer=0000000073e59620,dt_addr=0000000073e59620
check_valid_dts: FDT_ERR_BADMAGIC
get_partition_from_dts() 91: ret -9
get_partition_from_dts() 94: ret -9
get_ptbl_from_dtb()-272: get partition table from dts faild
mmc_device_init()-1254: get partition table from dtb failed
get_ptbl_rsv()-494: magic faild MPT, `<22>@
mmc_device_init()-1281: dtb&rsv are not exist, no LPT source
get partition info failed !!
Using default environment
In: serial
Out: serial
Err: serial
reboot_mode=cold_boot
[store]To run cmd[emmc dtb_read 0x1000000 0x40000]
_verify_dtb_checksum()-3477: calc 8e3465ad, store f9400c02
update_dtb_info()-3585: cpy 1 is not valid
_verify_dtb_checksum()-3477: calc 1665b9ec, store 52800100
update_dtb_info()-3585: cpy 0 is not valid
dtb_read()-3694: total valid 0
emmc - EMMC sub system
Usage:
emmc dtb_read addr size
emmc dtb_write addr size
emmc erase dtb
emmc erase key
emmc fastboot_read addr size
emmc fastboot_write addr size
[KM]Error:f[keymanage_dts_parse]L307:not a fdt at 0x0000000001000000
vpu: error: vpu: check dts: FDT_ERR_BADMAGIC, load default parameters
vpu: clk_level = 7
vpu: vpu_power_on
vpu: set clk: 666667000Hz, readback: 666666667Hz(0x100)
vpu: vpu_module_init_config
vpp: vpp_init
vpp: vpp osd2 matrix rgb2yuv…
libfdt fdt_check_header(): FDT_ERR_BADMAGIC
aml_config_dtb 642
aml_config_dtb 672
No FDT memory address configured. Please configure
the FDT address via "fdt addr " command.
Aborting!
No FDT memory address configured. Please configure
the FDT address via "fdt addr " command.
Aborting!
No FDT memory address configured. Please configure
the FDT address via "fdt addr " command.
Aborting!
No FDT memory address configured. Please configure
the FDT address via "fdt addr " command.
Aborting!
No FDT memory address configured. Please configure
the FDT address via "fdt addr " command.
Aborting!
No FDT memory address configured. Please configure
the FDT address via "fdt addr " command.
Aborting!
No FDT memory address configured. Please configure
the FDT address via "fdt addr " command.
Aborting!
No FDT memory address configured. Please configure
the FDT address via "fdt addr " command.
Aborting!
Net: No ethernet found.
CONFIG_AVB2: null
Start read misc partition datas!
Cannot find dev.
amlmmc cmd failed
store - STORE sub-system
Usage:
store init flag
store read name addr off|partition size
read ‘size’ bytes starting at offset ‘off’
to/from memory address ‘addr’, skipping bad blocks.
store write name addr off|partition size
write ‘size’ bytes starting at offset ‘off’
to/from memory address ‘addr’, skipping bad blocks.
store rom_write add off size.
<9>write uboot to the boot device
store erase boot/data:
<9>erase the area which is uboot or data
store erase partition <partition_name>:
<9>erase the area which partition in u-boot
store erase dtb
store erase key
store disprotect key
store rom_protect on/off
store scrub off|partition size
<9>scrub the area from offset and size
store dtb iread/read/write addr
<9>read/write dtb, size is optional
store key read/write addr
<9>read/write key, size is optional
store ddr_parameter read/write addr
<9>read/write ddr parameter, size is optional
store mbr addr
update mbr/partition table by dtb
[burnup]Err:store_read_ops,L84:cmd failed, ret=1, [store read misc 0x73e53090 0x0 0x820]
failed to store read misc.
info->magic =
info->version_major = 0
info->version_minor = 0
info->slots[0].priority = 0
info->slots[0].tries_remaining = 0
info->slots[0].successful_boot = 0
info->slots[1].priority = 0
info->slots[1].tries_remaining = 0
info->slots[1].successful_boot = 0
info->crc32 = 0
Magic is incorrect.
boot-info is invalid. Resetting.
save boot-info
info->magic =
info->version_major = 1
info->version_minor = 0
info->slots[0].priority = 15
info->slots[0].tries_remaining = 7
info->slots[0].successful_boot = 0
info->slots[1].priority = 14
info->slots[1].tries_remaining = 7
info->slots[1].successful_boot = 0
info->crc32 = -1075449479
Cannot find dev.
amlmmc cmd failed
store - STORE sub-system
Usage:
store init flag
store read name addr off|partition size
read ‘size’ bytes starting at offset ‘off’
to/from memory address ‘addr’, skipping bad blocks.
store write name addr off|partition size
write ‘size’ bytes starting at offset ‘off’
to/from memory address ‘addr’, skipping bad blocks.
store rom_write add off size.
<9>write uboot to the boot device
store erase boot/data:
<9>erase the area which is uboot or data
store erase partition <partition_name>:
<9>erase the area which partition in u-boot
store erase dtb
store erase key
store disprotect key
store rom_protect on/off
store scrub off|partition size
<9>scrub the area from offset and size
store dtb iread/read/write addr
<9>read/write dtb, size is optional
store key read/write addr
<9>read/write key, size is optional
store ddr_parameter read/write addr
<9>read/write ddr parameter, size is optional
store mbr addr
update mbr/partition table by dtb
[burnup]Err:store_write_ops,L148:cmd [store write misc 0x73e53090 0x0 0x820] failed active slot = 0
wipe_data=successful
wipe_cache=successful
upgrade_step=0
reboot_mode:::: cold_boot
[KM]Error:f[keymanage_dts_parse]L307:not a fdt at 0x0000000001000000
hpd_state=1
edid preferred_mode is 1080p60hz[16]
hdr mode is 0
dv mode is ver:0 len: 0
hdr10+ mode is 0
[OSD]check dts: FDT_ERR_BADMAGIC, load default fb_addr parameters
[OSD]set initrd_high: 0x3d800000
[OSD]fb_addr for logo: 0x3d800000
[OSD]check dts: FDT_ERR_BADMAGIC, load default fb_addr parameters
[OSD]fb_addr for logo: 0x3d800000
[OSD]VPP_OFIFO_SIZE:0xfff01fff
[CANVAS]canvas init
[CANVAS]addr=0x3d800000 width=3840, height=2160
Cannot find dev.
amlmmc cmd failed
store - STORE sub-system
Usage:
store init flag
store read name addr off|partition size
read ‘size’ bytes starting at offset ‘off’
to/from memory address ‘addr’, skipping bad blocks.
store write name addr off|partition size
write ‘size’ bytes starting at offset ‘off’
to/from memory address ‘addr’, skipping bad blocks.
store rom_write add off size.
<9>write uboot to the boot device
store erase boot/data:
<9>erase the area which is uboot or data
store erase partition <partition_name>:
<9>erase the area which partition in u-boot
store erase dtb
store erase key
store disprotect key
store rom_protect on/off
store scrub off|partition size
<9>scrub the area from offset and size
store dtb iread/read/write addr
<9>read/write dtb, size is optional
store key read/write addr
<9>read/write key, size is optional
store ddr_parameter read/write addr
<9>read/write ddr parameter, size is optional
store mbr addr
update mbr/partition table by dtb
[burnup]Err:store_read_ops,L84:cmd failed, ret=1, [store read logo 0x1080000 0x0 0x2000]
Err imgread(L537):Fail to read 0x2000B from part[logo] at offset 0
There is no valid bmp file at the given address
[OSD]osd_hw.free_dst_data: 0,1919,0,1079
[OSD]osd1_update_disp_freescale_enable
vpp: vpp_matrix_update: 2
set hdmitx VIC = 16
config HPLL = 5940000 frac_rate = 1
HPLL: 0x3b3a04f7
HPLL: 0x1b3a04f7
HPLL: 0xdb3a04f7
config HPLL done
j = 6 vid_clk_div = 1
hdmitx: set enc for VIC: 16
hdmitx phy setting done
enc_vpu_bridge_reset[1245]
rx version is 1.4 or below div=10
vpp: Rx hdr_info.hdr_sup_eotf_smpte_st_2084 = 0
[KM]Error:f[keymanage_dts_parse]L307:not a fdt at 0x0000000001000000
gpio: pin GPIOAO_3 (gpio 3) value is 1
Command: bcb uboot-command
Start read misc partition datas!
Cannot find dev.
amlmmc cmd failed
store - STORE sub-system
Usage:
store init flag
store read name addr off|partition size
read ‘size’ bytes starting at offset ‘off’
to/from memory address ‘addr’, skipping bad blocks.
store write name addr off|partition size
write ‘size’ bytes starting at offset ‘off’
to/from memory address ‘addr’, skipping bad blocks.
store rom_write add off size.
<9>write uboot to the boot device
store erase boot/data:
<9>erase the area which is uboot or data
store erase partition <partition_name>:
<9>erase the area which partition in u-boot
store erase dtb
store erase key
store disprotect key
store rom_protect on/off
store scrub off|partition size
<9>scrub the area from offset and size
store dtb iread/read/write addr
<9>read/write dtb, size is optional
store key read/write addr
<9>read/write key, size is optional
store ddr_parameter read/write addr
<9>read/write ddr parameter, size is optional
store mbr addr
update mbr/partition table by dtb
[burnup]Err:store_read_ops,L84:cmd failed, ret=1, [store read misc 0x73e53080 0x0 0x440]
failed to store read misc.
bcb - bcb
Usage:
bcb
This command will run some commands which saved in misc
partition by mark to decide whether execute command!
Command format:
bcb bcb_mark
Example:
/dev/block/misc partiton is saved some contents:
uboot-command
N/A
setenv aa 11;setenv bb 22;setenv cc 33;saveenv;
So you can execute command: bcb uboot-command
[KM]Error:f[keymanage_dts_parse]L307:not a fdt at 0x0000000001000000
Hit Enter or space or Ctrl+C key to stop autoboot – : 1 <\b><\b><\b> 0
pll tsensor avg: 0x2040, u_efuse: 0x8054
temp1: 39
ddr tsensor avg: 0x203d, u_efuse: 0x8035
temp2: 40
device cool done
CONFIG_SYSTEM_AS_ROOT: systemroot
system_mode: 1
Start read misc partition datas!
Cannot find dev.
amlmmc cmd failed
store - STORE sub-system
Usage:
store init flag
store read name addr off|partition size
read ‘size’ bytes starting at offset ‘off’
to/from memory address ‘addr’, skipping bad blocks.
store write name addr off|partition size
write ‘size’ bytes starting at offset ‘off’
to/from memory address ‘addr’, skipping bad blocks.
store rom_write add off size.
<9>write uboot to the boot device
store erase boot/data:
<9>erase the area which is uboot or data
store erase partition <partition_name>:
<9>erase the area which partition in u-boot
store erase dtb
store erase key
store disprotect key
store rom_protect on/off
store scrub off|partition size
<9>scrub the area from offset and size
store dtb iread/read/write addr
<9>read/write dtb, size is optional
store key read/write addr
<9>read/write key, size is optional
store ddr_parameter read/write addr
<9>read/write ddr parameter, size is optional
store mbr addr
update mbr/partition table by dtb
[burnup]Err:store_read_ops,L84:cmd failed, ret=1, [store read misc 0x73e53090 0x0 0x820]
failed to store read misc.
info->magic =
info->version_major = 0
info->version_minor = 0
info->slots[0].priority = 0
info->slots[0].tries_remaining = 0
info->slots[0].successful_boot = 0
info->slots[1].priority = 0
info->slots[1].tries_remaining = 0
info->slots[1].successful_boot = 0
info->crc32 = 0
Magic is incorrect.
boot-info is invalid. Resetting.
save boot-info
info->magic =
info->version_major = 1
info->version_minor = 0
info->slots[0].priority = 15
info->slots[0].tries_remaining = 7
info->slots[0].successful_boot = 0
info->slots[1].priority = 14
info->slots[1].tries_remaining = 7
info->slots[1].successful_boot = 0
info->crc32 = -1075449479
Cannot find dev.
amlmmc cmd failed
store - STORE sub-system
Usage:
store init flag
store read name addr off|partition size
read ‘size’ bytes starting at offset ‘off’
to/from memory address ‘addr’, skipping bad blocks.
store write name addr off|partition size
write ‘size’ bytes starting at offset ‘off’
to/from memory address ‘addr’, skipping bad blocks.
store rom_write add off size.
<9>write uboot to the boot device
store erase boot/data:
<9>erase the area which is uboot or data
store erase partition <partition_name>:
<9>erase the area which partition in u-boot
store erase dtb
store erase key
store disprotect key
store rom_protect on/off
store scrub off|partition size
<9>scrub the area from offset and size
store dtb iread/read/write addr
<9>read/write dtb, size is optional
store key read/write addr
<9>read/write key, size is optional
store ddr_parameter read/write addr
<9>read/write ddr parameter, size is optional
store mbr addr
update mbr/partition table by dtb
[burnup]Err:store_write_ops,L148:cmd [store write misc 0x73e53090 0x0 0x820] failed active slot = 0
CONFIG_AVB2: null
active_slot: normal
Cannot find dev.
amlmmc cmd failed
store - STORE sub-system
Usage:
store init flag
store read name addr off|partition size
read ‘size’ bytes starting at offset ‘off’
to/from memory address ‘addr’, skipping bad blocks.
store write name addr off|partition size
write ‘size’ bytes starting at offset ‘off’
to/from memory address ‘addr’, skipping bad blocks.
store rom_write add off size.
<9>write uboot to the boot device
store erase boot/data:
<9>erase the area which is uboot or data
store erase partition <partition_name>:
<9>erase the area which partition in u-boot
store erase dtb
store erase key
store disprotect key
store rom_protect on/off
store scrub off|partition size
<9>scrub the area from offset and size
store dtb iread/read/write addr
<9>read/write dtb, size is optional
store key read/write addr
<9>read/write key, size is optional
store ddr_parameter read/write addr
<9>read/write ddr parameter, size is optional
store mbr addr
update mbr/partition table by dtb
[burnup]Err:store_read_ops,L84:cmd failed, ret=1, [store read boot 0x1080000 0x0 0x100000]
Err imgread(L328):Fail to read 0x100000B from part[boot] at offset 0
[KM]Error:f[keymanage_dts_parse]L307:not a fdt at 0x0000000001000000
InUsbBurn
[MSG]sof
Set Addr 17
Get DT cfg
Get DT cfg
set CFG
sof timeout, reset usb phy tuning
What are the correct steps to get your images up and running?
Thanks a lot.