GPIO voltage & short circuit to GND

Unfortunately the RK3399 supports only 1.8V and 3.0V I/O. Most of the GPIOs on the GPIO header are 3.0V as stated in the Wiki. I’ve read the RK3399 TRM, Data sheet, and Design Guide but I have not found any information on how robust the GPIO drivers are.

As stated in this wiki page some pins have pull ups to 3.3V. However, the maximum voltage is 3.15V according to the RK3399 data sheet. Why did you choose to pull the pins up to 3V3 instead of 3V0? The internal body diodes will clamp the voltage to ~3V15 anyway. A pull up to 3V0 would at least be within specification. Or do you have any indication from Rockchip that pull-up resistors to 3V3 are ok?

If over-voltage on those pins is ok, how much current is allowed to flow? With 4k7 to 3V3 I would estimate somewhere between 64 to 32 µA (depending on whether you take the difference to 3V15 or 3V0).

The spi-install wiki page even suggests shorting the SPICLK GPIO to GND.

The Design Guide states that in boot mode the SPI GPIOs are configured for 7mA drive strength. None of the documents state that a continuous short to GND is ok. Do you have any more information on this?

If there is ever a 1.5 revision of the Rock Pi I would suggest putting 3.0V on the 3.3V GPIO header pins 1 and 17. I’d also change the pull-ups for I2C to the 3V0 rail (or maybe require external pull-ups?). Any 2.7 - 3.6V-device powered from the GPIO pins 1 and 17 will work with 3.0V and it will have the correct voltage on the GPIOs.

As it is you either require:
(1) external 3.0V power supply
(2) series resistors on the GPIO lines to at least limit the current into the GPIO pins of the RK3399
(3) level shifter IC on the GPIO
(4) risk damaging the GPIO pins - or even the whole chip by applying 3V3 without protection

I think that the wiki page you refer to may be somewhat out of date, or simply in error. In particular, look at page 12 of the rev. 1.3 schematic at the top center of the page, it is showing that GPIO2_A0, GPIO2_A1, I2C7_SDA, I2C7_SCL, GPIO2_B1, and GPIO2_B2 are pulled up to VCC_3V0 via 4.7k. Those 6 pins correspond to the line in the wiki about being pulled up to 3v3.

3 Likes

And probably the reason why they are supplying 3v3 on pins 1 and 17 have to do with current. VCC_3V0 is output from the PMIC and maximum of 300 mA. VCC3V3_SYS is supplied by a 2A buck.

Although I do agree that it would be better to have 3.0 on the header.

1 Like

The Design Guide states that in boot mode the SPI GPIOs are configured for 7mA drive strength. None of the documents state that a continuous short to GND is ok. Do you have any more information on this?

The spi-install wiki page even suggests shorting the SPICLK GPIO to GND.

On the spi install wiki page, it’s not continuous shortcut. It’s just shortcut and remove.

Also, usually in bootrom or maskrom, after setting the registers and try to load and if failed, the code should restore the registers or the state for next loader, or the default power on state is not right.

I think that the wiki page you refer to may be somewhat out of date, or simply in error. In particular, look at page 12 of the rev. 1.3 schematic at the top center of the page, it is showing that GPIO2_A0, GPIO2_A1, I2C7_SDA, I2C7_SCL, GPIO2_B1, and GPIO2_B2 are pulled up to VCC_3V0 via 4.7k. Those 6 pins correspond to the line in the wiki about being pulled up to 3v3.

Nice caught, we will fix the wiki page.

1 Like

You are right. The schematic shows those pull-ups to be to 3V0. The wiki seems to have received an update, because it now states that those pull-ups go to 3V0 (which makes more sense :wink:)

Nobody says you can’t have a 2A buck for 3V0 :wink: … Anyway I guess 500mA would be plenty on that header.

True, but every design decision comes down to being a tradeoff between perfection and cost.

300 mA, minus whatever draw is already on it, and you never build a circuit to draw at its absolute limit. I’d say that realistically, you have about 150 mA of current available from VCC_3V0.

… which may still be enough. Now that I look at the raspberry pi specifications, they’re actually saying that their 3v3 can only supply about 50 mA.

And the fact that VCC_3V0 is from an LDO means that it would be a much better choice for things like sound cards or other noise sensitive peripherals.

True. But some things are worth their cost or are end up being even costlier. Now you either need a hat with (bidrectional!) voltage shifters (and you don’t see the nice coloured 40-pin no more), risk burning out your RK3399, or some series resistors.

The schematic says they need 13.5mA on 3V0, which leaves 280mA :wink:
But seriously, I can see an I2C level shifter, the I2C pull ups, and the supply to I/O banks – their current will depend on the output current of the pins, which will usually be only micro amps.

The 50mA the RPi spec says should definitely be possible. (But I agree, more would be nice. But realistically you wouldn’t need much more. Any HAT with more should use 5V and have a regulator on-board.)

But this way, I can’t even grab 3.0V as V_target for my serial cable :sob:

An LDO integrated into an PMIC with how many switching regulators? :slight_smile: That supply rail will be every thing but noiseless.

Update:

@lbdroidman Do you have any peripherals connected to the GPIOs? What would your preferred method of connecting them be? (Level shifter, series resistor, nothing, something else entirely?, integrated on a HAT?)

Maybe cut the 3V3 traces to pin 1 & 17 and re-wire them to 3V0? Because the only problem is that you don’t have 3V0 available to power external 3V3 peripherals (which should work fine @3V0)

I don’t actually use RockPi4. I use Rock960, which matches the 96boards CE specifications (for the most part). Its made by the same people, and its similar enough (virtually identical schematics), that nearly everything is applicable to both.

Except the I/O voltage, since 96boards specifies 1.8V I/O.

I have designed a number of mezzanine boards for 96boards CE that would work on the Rock960, including https://groupgets.com/campaigns/485-i2s-mezzanine

Note that on that particular board, the 2 DAC’s and the ADC require 3.3v for their analog sides, and 1.8v for their digital sides, so the 1.8v is supplied directly from the header, and the 3.3v is supplied by an L4931-3.3 from 5v on the header.

Ah, I see. I guess it’s like the Odroid XU4, which has a 1.8V GPIO header. There a riser card is offered with level shifters to go to either 3V3 or 5V0.

For 1.8V that makes sense because there is more 3V3-hardware (readily) available.

I’ll guess I’ll cut the traces and connect to either the internal 3V0 or add another 3V0 LDO.

1 Like

Most of the higher end hardware is all 1.8v now. Its more of entry level or older stuff that remains 3.3. Things that are more readily compatible with the pi/arduino perspectives.

Yea, sure. What I meant was 3v3-hardware is more available at retailers (at least in my country).