First install of Debian --- EMMC Corrupted?

#1

Hi all:

Trying to get my Zero to install the Radxa Debian image. I can see it in lsusb, however it does not show in fdisk.

This is what lsusb looks like:

Bus 003 Device 001: ID 1d6b:0003 Linux Foundation 3.0 root hub
Bus 002 Device 002: ID 1b8e:c003 Amlogic, Inc. GX-CHIP
Bus 002 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub

Any thoughts on what’s going on below? Note this is the first time the install has made it to seq=11 before failing. All other attempts failed at seq=3.

user@debian:~/Downloads/radxa$ sudo boot-g12.py factory-loader.img
Firmware Version :
ROM: 3.2 Stage: 0.0
Need Password: 0 Password OK: 1
Writing factory-loader.img at 0xfffa0000…
[DONE]
Running at 0xfffa0000…
[DONE]
AMLC dataSize=16384, offset=65536, seq=0…
[DONE]
AMLC dataSize=49152, offset=393216, seq=1…
[DONE]
AMLC dataSize=16384, offset=229376, seq=2…
[DONE]
AMLC dataSize=49152, offset=81920, seq=3…
[DONE]
AMLC dataSize=16384, offset=65536, seq=4…
[DONE]
AMLC dataSize=49152, offset=393216, seq=5…
[DONE]
AMLC dataSize=16384, offset=229376, seq=6…
[DONE]
AMLC dataSize=49152, offset=180224, seq=7…
[DONE]
AMLC dataSize=16384, offset=65536, seq=8…
[DONE]
AMLC dataSize=49152, offset=393216, seq=9…
[DONE]
AMLC dataSize=16384, offset=229376, seq=10…
[DONE]
AMLC dataSize=49152, offset=245760, seq=11…
Traceback (most recent call last):
File “/usr/local/bin/boot-g12.py”, line 57, in
dev.writeAMLCData(seq, offset, data[offset:offset+length])
File “/usr/local/lib/python3.9/dist-packages/pyamlboot/pyamlboot.py”, line 462, in writeAMLCData
self._writeAMLCData(amlcOffset, amls)
File “/usr/local/lib/python3.9/dist-packages/pyamlboot/pyamlboot.py”, line 416, in _writeAMLCData
data = epin.read(16, 1000)
File “/usr/local/lib/python3.9/dist-packages/usb/core.py”, line 423, in read
return self.device.read(self, size_or_buffer, timeout)
File “/usr/local/lib/python3.9/dist-packages/usb/core.py”, line 1029, in read
ret = fn(
File “/usr/local/lib/python3.9/dist-packages/usb/backend/libusb1.py”, line 846, in bulk_read
return self.__read(self.lib.libusb_bulk_transfer,
File “/usr/local/lib/python3.9/dist-packages/usb/backend/libusb1.py”, line 954, in __read
_check(retval)
File “/usr/local/lib/python3.9/dist-packages/usb/backend/libusb1.py”, line 604, in _check
raise USBError(_strerror(ret), ret, _libusb_errno[ret])
usb.core.USBError: [Errno 5] Input/Output Error

#2

I think you need “pip install libusb” … it’s complaining about a missing python module

#3

Chewitt:

Thanks for the suggestion.
I installed libusb using pip as suggested. Unfortunately, no go. The error looks the same. Only the run fails at seq:4 this time instead of seq:11 from the post yesterday.

Tony

user@debian:~$ sudo pip3 install libusb
Collecting libusb
Downloading libusb-1.0.24b3-py3-none-any.whl (259 kB)
|████████████████████████████████| 259 kB 1.8 MB/s
Collecting importlib-metadata>=4.9.0
Downloading importlib_metadata-4.11.1-py3-none-any.whl (17 kB)
Collecting pkg-about>=1.0.4
Downloading pkg_about-1.0.4-py3-none-any.whl (4.8 kB)
Collecting importlib-resources>=5.4.0
Downloading importlib_resources-5.4.0-py3-none-any.whl (28 kB)
Requirement already satisfied: setuptools>=42.0.2 in /usr/lib/python3/dist-packages (from libusb) (52.0.0)
Collecting packaging>=21.3.0
Downloading packaging-21.3-py3-none-any.whl (40 kB)
|████████████████████████████████| 40 kB 6.4 MB/s
Collecting zipp>=0.5
Downloading zipp-3.7.0-py3-none-any.whl (5.3 kB)
Collecting pyparsing!=3.0.5,>=2.0.2
Downloading pyparsing-3.0.7-py3-none-any.whl (98 kB)
|████████████████████████████████| 98 kB 4.0 MB/s
Installing collected packages: zipp, pyparsing, packaging, importlib-resources, importlib-metadata, pkg-about, libusb
Successfully installed importlib-metadata-4.11.1 importlib-resources-5.4.0 libusb-1.0.24b3 packaging-21.3 pkg-about-1.0.4 pyparsing-3.0.7 zipp-3.7.0

user@debian:~/Downloads/radxa$ sudo boot-g12.py factory-loader.img
Firmware Version :
ROM: 3.2 Stage: 0.0
Need Password: 0 Password OK: 1
Writing factory-loader.img at 0xfffa0000…
[DONE]
Running at 0xfffa0000…
[DONE]
AMLC dataSize=16384, offset=65536, seq=0…
[DONE]
AMLC dataSize=49152, offset=393216, seq=1…
[DONE]
AMLC dataSize=16384, offset=229376, seq=2…
[DONE]
AMLC dataSize=49152, offset=81920, seq=3…
[DONE]
AMLC dataSize=16384, offset=65536, seq=4…
Traceback (most recent call last):
File “/usr/local/bin/boot-g12.py”, line 57, in
dev.writeAMLCData(seq, offset, data[offset:offset+length])
File “/usr/local/lib/python3.9/dist-packages/pyamlboot/pyamlboot.py”, line 455, in writeAMLCData
self._writeAMLCData(offset, data[offset:offset+writeLength])
File “/usr/local/lib/python3.9/dist-packages/pyamlboot/pyamlboot.py”, line 411, in _writeAMLCData
epout.write(data[dataOffset:dataOffset+blockLength], 1000)
File “/usr/local/lib/python3.9/dist-packages/usb/core.py”, line 408, in write
return self.device.write(self, data, timeout)
File “/usr/local/lib/python3.9/dist-packages/usb/core.py”, line 989, in write
return fn(
File “/usr/local/lib/python3.9/dist-packages/usb/backend/libusb1.py”, line 837, in bulk_write
return self.__write(self.lib.libusb_bulk_transfer,
File “/usr/local/lib/python3.9/dist-packages/usb/backend/libusb1.py”, line 938, in __write
_check(retval)
File “/usr/local/lib/python3.9/dist-packages/usb/backend/libusb1.py”, line 604, in _check
** raise USBError(_strerror(ret), ret, _libusb_errno[ret])**
usb.core.USBError: [Errno 5] Input/Output Error

#4

Try follow our guide and load radxa-zero-erase-emmc.bin instead.

#5

Thank you for the suggestion. I tried to run the bin file. Unfortunately, it Failed on an overflow error (Errno75).

user@debian:~/Downloads/radxa$ sudo boot-g12.py radxa-zero-erase-emmc.bin
Traceback (most recent call last):
File “/usr/local/bin/boot-g12.py”, line 23, in
socid = dev.identify()
File “/usr/local/lib/python3.9/dist-packages/pyamlboot/pyamlboot.py”, line 304, in identify
ret = self.dev.ctrl_transfer(bmRequestType = 0xc0,
File “/usr/local/lib/python3.9/dist-packages/usb/core.py”, line 1082, in ctrl_transfer
ret = self._ctx.backend.ctrl_transfer(
File “/usr/local/lib/python3.9/dist-packages/usb/backend/libusb1.py”, line 893, in ctrl_transfer
ret = _check(self.lib.libusb_control_transfer(
File “/usr/local/lib/python3.9/dist-packages/usb/backend/libusb1.py”, line 604, in _check
raise USBError(_strerror(ret), ret, _libusb_errno[ret])
usb.core.USBError: [Errno 75] Overflow

#6

Did you reboot after installing libusb?

#7

Yes. It was rebooted and has been many times.

I have downloaded PyCharm to start debugging the python scripts to see where this thing is going off the rails. When I get some time I will be doing some more exploring…

This is turning into more of a challenge than anticipated…in the end it will likely be something simple or not…

#8

Still having issues getting the Zero to boot.

Using the PyCharm debugger on a Ubuntu 20.04 Virtual box VM, runninng on a Windows 10 host where the Zadig-2.7 program was used to install the libusb-win32 (v1.2.6.0) the driver. I have been stepping through sudo boot-g12.py.

Command:
sudo boot-g12.py radxa-zero-erase-emmc.bin

in debug:

writeLargeMemory, pyamlboot.py::229
, boot-g12.py:35

These values showed up in the variable
self= {AmlogigSoC}<pyamlboot.pyamlboot.AmlogicSoC object at 0x7fe4a82af7f0>

idVendor=49155
idProduct=7054
manufacturer=‘Amlogic’
product=‘GX-CHIP’

However looking in DMSEG thes values are being reported:

[ 402.964909] usb 1-2: new high-speed USB device number 3 using xhci_hcd
[ 403.363719] usb 1-2: New USB device found, idVendor=1b8e, idProduct=c003, bcdDevice= 0.20
[ 403.363727] usb 1-2: New USB device strings: Mfr=1, Product=2, SerialNumber=0
[ 403.363731] usb 1-2: Product: GX-CHIP
[ 403.363733] usb 1-2: Manufacturer: Amlogic

Any thoughts are appreciated. Could this be the source of the problem?

#9

Hello. I’m sorry I don’t have a solution for you and this is just to clarify: USB vendor and device IDs are in hexadecimal, and those lines in the Python analysis are the same values in decimal.

$ pcalc 0xc003
	49155           	0xc003            	0y1100000000000011
$ pcalc 0x1b8e
	7054            	0x1b8e            	0y1101110001110

I don’t know about this exact problem; actually, I’m just digging around for clues to get Alpine working from the ground up, because I know almost nothing about U-Boot.

I was thinking you might watch for errors in dmesg -w while running boot-g12.py but then I see your native OS is Windows, so if there are power problems, they might be caught only by the Windows USB stack. I really don’t know. (wow, are we noticing a trend?)

I’m not sure how VirtualBox is there but here when I’m doing these kinds of things, I need to re-connect the USB device from the Devices menu on the host, whenever its USB connector turns off and back on as a different device. I think at some point I used a setting in VirtualBox to cause it to automatically connect USB devices so that some phone-flashing program would be able to keep working when the device ID would change. It seems you could create a catch-all filter in the USB Settings for that VM, and then any newly plugged USB device would be attached to the VM immediately. If you make a blank filter and then don’t set any IDs, it matches and grabs everything… supposedly.

I would like to prove it to myself but for some reason USB filters aren’t working here today. (shrug) edit: actually a filter with just the Logitech vendor ID works and does in fact auto-connect multiple mice. It’s apparently just the catch-all filter that doesn’t work for me. If it likewise didn’t work on yours, you could probably get by with making as many filters as there are vendor IDs that will appear on this device in your workflow – Radxa, AMlogic, etc.

edit++: actually the catch-all filter is sort of working here but not quite predictably. Amlogic, Inc. GX-CHIP was connected but USB drives were not and …never mind my crazy things.

#10

Originally, I thought there might some issues using a VM on Windows for debugging. So I used a bare metal Debian 11 machine. Results were essentially the same when running “boot-g12.py radxa-zero-erase-emmc.bin”.

In VirtualBox I set a flag to load USB 3 device in the machine settings and specified the Windows driver name for the Zero when it showed up in the drop down.

When I plug in the Zero it shows up on my Ubuntu VM in LSUSB and dmseg. Though not as a mounted USB device. Same on my bare metal Debian machine.

Thanks for the Hex translation, I thought it might be something like that…I tried a couple of web Hex to ASCII translators with little success…

#11

1b8e:c003 means the board is in maskrom mode and it is normal that you didn’t get USB storage device. After it shows up in lsusb you then can run sudo boot-g12.py radxa-zero-erase-emmc.bin, which should give you a USB storage device after a short while.

If that still gives you error there are a few things you can try:

  • attach a serial cable so we can see what was wrong
  • install system to a microSD card and boot off there, and then install the system to eMMC
#12

RadxaYuntian:

Thank you for responding. Any guidance you can provide is truely appreciated.

Here is the output from the command:
sudo boot-g12.py radxa-zero-erase-emmc.bin

Firmware Version :
ROM: 3.2 Stage: 0.0
Need Password: 0 Password OK: 1
Writing radxa-zero-erase-emmc.bin at 0xfffa0000…
[DONE]
Running at 0xfffa0000…
[DONE]
AMLC dataSize=16384, offset=65536, seq=0…
[DONE]
AMLC dataSize=49152, offset=393216, seq=1…
[DONE]
AMLC dataSize=16384, offset=229376, seq=2…
[DONE]
AMLC dataSize=49152, offset=245760, seq=3…
[DONE]
AMLC dataSize=49152, offset=294912, seq=4…
Traceback (most recent call last):

  • File “/usr/local/bin/boot-g12.py”, line 57, in *
  • dev.writeAMLCData(seq, offset, data[offset:offset+length])*
  • File “/usr/local/lib/python3.9/dist-packages/pyamlboot/pyamlboot.py”, line 462, in writeAMLCData*
  • self._writeAMLCData(amlcOffset, amls)*
  • File “/usr/local/lib/python3.9/dist-packages/pyamlboot/pyamlboot.py”, line 416, in _writeAMLCData*
  • data = epin.read(16, 1000)*
  • File “/usr/local/lib/python3.9/dist-packages/usb/core.py”, line 423, in read*
  • return self.device.read(self, size_or_buffer, timeout)*
  • File “/usr/local/lib/python3.9/dist-packages/usb/core.py”, line 1029, in read*
  • ret = fn(*
  • File “/usr/local/lib/python3.9/dist-packages/usb/backend/libusb1.py”, line 846, in bulk_read*
  • return self.__read(self.lib.libusb_bulk_transfer,*
  • File “/usr/local/lib/python3.9/dist-packages/usb/backend/libusb1.py”, line 954, in __read*
  • _check(retval)*
  • File “/usr/local/lib/python3.9/dist-packages/usb/backend/libusb1.py”, line 604, in _check*
  • raise USBError(_strerror(ret), ret, _libusb_errno[ret])*
    usb.core.USBError: [Errno 5] Input/Output Error

-------------------------------------------------------
— Minicom Output —
-------------------------------------------------------

user@debian:~/Downloads/radxa$ sudo minicom zero

Welcome to minicom 2.8

OPTIONS: I18n
Port /dev/ttyUSB0, 21:46:16

Press CTRL-A Z for help on special keys

G12A:BL:0253b8:61aa2d;FEAT:E0F83180:2000;POC:D;RCY:0;USB:0;0.0
l2_stage_init 0x01
bl2_stage_init 0x81
hw id: 0x0001 - pwm id 0x00
bl2_stage_init 0xc0
bl2_stage_init 0x02

L0:00000000
L1:00000703
L2:00008067
L3:04000000
S1:00000000
B2:00002000
B1:e0f83180

TE: 11492085

BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz

Board ID = 2
Set cpu clk to 24M
Set clk81 to 24M
CPU clk: 1200 MHz
Set clk81 to 166.6M
DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
board id: 2
Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
DATA transfer complete…
fw parse done
DATA transfer complete…
AML DDR FW load done
DATA transfer complete…
PIEI prepare done
LPDDR4 probe
ddr clk to 792MHz
DATA transfer complete…

dmc_version 0000
Check phy result
INFO : End of CA training
INFO : End of initialization
INFO : Training has run successfully!
Check phy result
INFO : End of initialization
INFO : End of read enable training
INFO : End of fine write leveling
INFO : End of Write leveling coarse delay
INFO : Training has run successfully!
Check phy result
INFO : End of initialization
INFO : End of read dq deskew training
INFO : End of MPR read delay center optimization
INFO : End of write delay center optimization
INFO : End of read delay center optimization
INFO : End of max read latency training
INFO : Training has run successfully!
1D init succeed
DATA transfer complete…
Check phy result
INFO : End of initialization
INFO : End of 2D read delay Voltage center optimization
INFO : End of 2D read delay Voltage center optimization
INFO : End of 2D write delay Voltage center optimization
INFO : End of 2D write delay Voltage center optimization
INFO : Training has run successfully!

channel==0
RxClkDly_Margin_A0==236 ps 12
TxDqDly_Margin_A0==236 ps 12
RxClkDly_Margin_A1==236 ps 12
TxDqDly_Margin_A1==236 ps 12
TrainedVREFDQ_A0==74
TrainedVREFDQ_A1==74
VrefDac_Margin_A0==25
DeviceVref_Margin_A0==40
VrefDac_Margin_A1==25
DeviceVref_Margin_A1==40

channel==1
RxClkDly_Margin_A0==236 ps 12
TxDqDly_Margin_A0==236 ps 12
RxClkDly_Margin_A1==236 ps 12
TxDqDly_Margin_A1==236 ps 12
TrainedVREFDQ_A0==74
TrainedVREFDQ_A1==74
VrefDac_Margin_A0==24
DeviceVref_Margin_A0==40
VrefDac_Margin_A1==24
DeviceVref_Margin_A1==40

dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004

soc_vref_reg_value 0x 00000015 00000015 00000013 00000016 00000015 00000015 0002
2D init succeed
ddr init done, boot next stage
result report
aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:53:31
auto size-- 65535DDR cs0 size: 2048MB
DDR cs1 size: 2048MB
DMC_DDR_CTRL: 00e00024DDR size: 3928MB
cs0 DataBus test pass
cs1 DataBus test pass
cs0 AddrBus test pass
cs1 AddrBus test pass

#13

Ok this looks really weird. It seems like you are having some issue with mainline U-Boot. Can you try loading factory-loader.img and print me the output? Also can you check if you can install Android on your Zero? Those two use a different kind of U-Boot so might give different result.

#14

RadxaYuntian:

Thanks again for the help.

I tried booting from the SD card. On screen it just shows the AmLogic logo identifying the S905Y chip.

The serial console seems to be terminating at the same spot as the previous post when running “sudo boot-g12.py radxa-zero-erase-emmc.bin”.

Here is the output from sudo boot-g12.py factory-loader.img:

Firmware Version :
ROM: 3.2 Stage: 0.0
Need Password: 0 Password OK: 1
Writing factory-loader.img at 0xfffa0000…
[DONE]
Running at 0xfffa0000…
[DONE]
AMLC dataSize=16384, offset=65536, seq=0…
[DONE]
AMLC dataSize=49152, offset=393216, seq=1…
[DONE]
AMLC dataSize=16384, offset=229376, seq=2…
[DONE]
AMLC dataSize=49152, offset=81920, seq=3…
[DONE]
AMLC dataSize=16384, offset=65536, seq=4…
[DONE]
AMLC dataSize=49152, offset=393216, seq=5…
[DONE]
AMLC dataSize=16384, offset=229376, seq=6…
[DONE]
AMLC dataSize=49152, offset=180224, seq=7…
[DONE]
AMLC dataSize=16384, offset=65536, seq=8…
[DONE]
AMLC dataSize=49152, offset=393216, seq=9…
[DONE]
AMLC dataSize=16384, offset=229376, seq=10…
[DONE]
AMLC dataSize=49152, offset=245760, seq=11…
[DONE]
AMLC dataSize=49152, offset=294912, seq=12…
Traceback (most recent call last):

  • File “/usr/local/bin/boot-g12.py”, line 57, in *
  • dev.writeAMLCData(seq, offset, data[offset:offset+length])*
  • File “/usr/local/lib/python3.9/dist-packages/pyamlboot/pyamlboot.py”, line 462, in writeAMLCData*
  • self._writeAMLCData(amlcOffset, amls)*
  • File “/usr/local/lib/python3.9/dist-packages/pyamlboot/pyamlboot.py”, line 416, in _writeAMLCData*
  • data = epin.read(16, 1000)*
  • File “/usr/local/lib/python3.9/dist-packages/usb/core.py”, line 423, in read*
  • return self.device.read(self, size_or_buffer, timeout)*
  • File “/usr/local/lib/python3.9/dist-packages/usb/core.py”, line 1029, in read*
  • ret = fn(*
  • File “/usr/local/lib/python3.9/dist-packages/usb/backend/libusb1.py”, line 846, in bulk_read*
  • return self.__read(self.lib.libusb_bulk_transfer,*
  • File “/usr/local/lib/python3.9/dist-packages/usb/backend/libusb1.py”, line 954, in __read*
  • _check(retval)*
  • File “/usr/local/lib/python3.9/dist-packages/usb/backend/libusb1.py”, line 604, in _check*
  • raise USBError(_strerror(ret), ret, _libusb_errno[ret])*
    usb.core.USBError: [Errno 5] Input/Output Error

-------------------------------------------------------
— Minicom Output —
-------------------------------------------------------

user@debian:~/Downloads/radxa$ sudo minicom radxa zero

Welcome to minicom 2.8

OPTIONS: I18n
Port /dev/ttyUSB0, 11:50:54

Press CTRL-A Z for help on special keys

0.0
l2_stage_init 0x01
bl2_stage_init 0x81
hw id: 0x0001 - pwm id 0x00
bl2_stage_init 0xc0
bl2_stage_init 0x02

L0:00000000
L1:00000703
L2:00008067
L3:04000000
S1:00000000
B2:00002000
B1:e0f83180

TE: 135790112

BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz

Board ID = 2
Set cpu clk to 24M
Set clk81 to 24M
CPU clk: 1200 MHz
Set clk81 to 166.6M
DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
board id: 2
Cfg max: 5, cur: 1. Board id: 255. Force loop cfg
DATA transfer complete…
fw parse done
DATA transfer complete…
AML DDR FW load done
DATA transfer complete…
PIEI prepare done
DDR4 probe
ddr clk to 792MHz
DATA transfer complete…

dmc_version 0000
Check phy result
INFO : End of initialization
INFO : ERROR : Training has failed!
Cfg max: 5, cur: 2. Board id: 255. Force loop cfg
ddr probe id done
DATA transfer complete…
fw parse done
DATA transfer complete…
AML DDR FW load done
DATA transfer complete…
PIEI prepare done
DDR3 probe
ddr clk to 792MHz
DATA transfer complete…

dmc_version 0000
Check phy result
INFO : End of initialization
INFO : ERROR : Training has failed!
Cfg max: 5, cur: 3. Board id: 255. Force loop cfg
ddr probe id done
DATA transfer complete…
fw parse done
DATA transfer complete…
AML DDR FW load done
DATA transfer complete…
PIEI prepare done
LPDDR4 probe
ddr clk to 792MHz
DATA transfer complete…

dmc_version 0000
Check phy result
INFO : End of CA training
INFO : End of initialization
INFO : Training has run successfully!
Check phy result
INFO : End of initialization
INFO : End of read enable training
INFO : End of fine write leveling
INFO : End of Write leveling coarse delay
INFO : Training has run successfully!
Check phy result
INFO : End of initialization
INFO : End of read dq deskew training
INFO : End of MPR read delay center optimization
INFO : End of write delay center optimization
INFO : End of read delay center optimization
INFO : End of max read latency training
INFO : Training has run successfully!
1D init succeed
DATA transfer complete…
Check phy result
INFO : End of initialization
INFO : End of 2D read delay Voltage center optimization
INFO : End of 2D read delay Voltage center optimization
INFO : End of 2D write delay Voltage center optimization
INFO : End of 2D write delay Voltage center optimization
INFO : Training has run successfully!

channel==0
RxClkDly_Margin_A0==236 ps 12
TxDqDly_Margin_A0==236 ps 12
RxClkDly_Margin_A1==236 ps 12
TxDqDly_Margin_A1==236 ps 12
TrainedVREFDQ_A0==74
TrainedVREFDQ_A1==74
VrefDac_Margin_A0==24
DeviceVref_Margin_A0==40
VrefDac_Margin_A1==25
DeviceVref_Margin_A1==40

channel==1
RxClkDly_Margin_A0==256 ps 13
TxDqDly_Margin_A0==236 ps 12
RxClkDly_Margin_A1==236 ps 12
TxDqDly_Margin_A1==236 ps 12
TrainedVREFDQ_A0==74
TrainedVREFDQ_A1==74
VrefDac_Margin_A0==25
DeviceVref_Margin_A0==40
VrefDac_Margin_A1==25
DeviceVref_Margin_A1==40

dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004

soc_vref_reg_value 0x 00000015 00000015 00000012 00000015 00000014 00000015 000e
2D init succeed
ddr init done, boot next stage
result report
aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:53:31
auto size-- 65535DDR cs0 size: 2048MB
DDR cs1 size: 2048MB
DMC_DDR_CTRL: 00e00024DDR size: 3928MB
cs0 DataBus test pass
cs1 DataBus test pass
cs0 AddrBus test pass
cs1 AddrBus test pass

#15

I followed the guide to to install Android 9 from the directions provided. Note this is Debian 11, runnning directly on the host, not in a VM.
The inital command I ran was:

sudo boot-g12.py bootloader.img

user@debian:~/Downloads/radxa/radxa_zero_android_9_20211020-fastboot.img$ sudo boot-g12.py bootloader.img
Firmware Version :
ROM: 3.2 Stage: 0.0
Need Password: 0 Password OK: 1
Writing bootloader.img at 0xfffa0000…
[DONE]
Running at 0xfffa0000…
[DONE]
AMLC dataSize=16384, offset=65536, seq=0…
[DONE]
AMLC dataSize=49152, offset=393216, seq=1…
[DONE]
AMLC dataSize=16384, offset=229376, seq=2…
[DONE]
AMLC dataSize=49152, offset=245760, seq=3…
[DONE]
AMLC dataSize=49152, offset=294912, seq=4…
Traceback (most recent call last):

  • File “/usr/local/bin/boot-g12.py”, line 57, in *
  • dev.writeAMLCData(seq, offset, data[offset:offset+length])*
  • File “/usr/local/lib/python3.9/dist-packages/pyamlboot/pyamlboot.py”, line 462, in writeAMLCData*
  • self._writeAMLCData(amlcOffset, amls)*
  • File “/usr/local/lib/python3.9/dist-packages/pyamlboot/pyamlboot.py”, line 416, in _writeAMLCData*
  • data = epin.read(16, 1000)*
  • File “/usr/local/lib/python3.9/dist-packages/usb/core.py”, line 423, in read*
  • return self.device.read(self, size_or_buffer, timeout)*
  • File “/usr/local/lib/python3.9/dist-packages/usb/core.py”, line 1029, in read*
  • ret = fn(*
  • File “/usr/local/lib/python3.9/dist-packages/usb/backend/libusb1.py”, line 846, in bulk_read*
  • return self.__read(self.lib.libusb_bulk_transfer,*
  • File “/usr/local/lib/python3.9/dist-packages/usb/backend/libusb1.py”, line 954, in __read*
  • _check(retval)*
  • File “/usr/local/lib/python3.9/dist-packages/usb/backend/libusb1.py”, line 604, in _check*
  • raise USBError(_strerror(ret), ret, _libusb_errno[ret])*
    usb.core.USBError: [Errno 5] Input/Output Error

It keeps failing at the same spot in the serial terminal:

------------------------------------------------------
— Minicom Output —
-------------------------------------------------------
0.0
l2_stage_init 0x01
bl2_stage_init 0x81
hw id: 0x0001 - pwm id 0x00
bl2_stage_init 0xc0
bl2_stage_init 0x02

L0:00000000
L1:00000703
L2:00008067
L3:04000000
S1:00000000
B2:00002000
B1:e0f83180

TE: 971017882

BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz

Board ID = 2
Set cpu clk to 24M
Set clk81 to 24M
CPU clk: 1200 MHz
Set clk81 to 166.6M
DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
board id: 2
Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
DATA transfer complete…
fw parse done
DATA transfer complete…
AML DDR FW load done
DATA transfer complete…
PIEI prepare done
LPDDR4 probe
ddr clk to 792MHz
DATA transfer complete…

dmc_version 0000
Check phy result
INFO : End of CA training
INFO : End of initialization
INFO : Training has run successfully!
Check phy result
INFO : End of initialization
INFO : End of read enable training
INFO : End of fine write leveling
INFO : End of Write leveling coarse delay
INFO : Training has run successfully!
Check phy result
INFO : End of initialization
INFO : End of read dq deskew training
INFO : End of MPR read delay center optimization
INFO : End of write delay center optimization
INFO : End of read delay center optimization
INFO : End of max read latency training
INFO : Training has run successfully!
1D init succeed
DATA transfer complete…
Check phy result
INFO : End of initialization
INFO : End of 2D read delay Voltage center optimization
INFO : End of 2D read delay Voltage center optimization
INFO : End of 2D write delay Voltage center optimization
INFO : End of 2D write delay Voltage center optimization
INFO : Training has run successfully!

channel==0
RxClkDly_Margin_A0==236 ps 12
TxDqDly_Margin_A0==236 ps 12
RxClkDly_Margin_A1==236 ps 12
TxDqDly_Margin_A1==236 ps 12
TrainedVREFDQ_A0==74
TrainedVREFDQ_A1==74
VrefDac_Margin_A0==25
DeviceVref_Margin_A0==40
VrefDac_Margin_A1==25
DeviceVref_Margin_A1==40

channel==1
RxClkDly_Margin_A0==256 ps 13
TxDqDly_Margin_A0==236 ps 12
RxClkDly_Margin_A1==236 ps 12
TxDqDly_Margin_A1==236 ps 12
TrainedVREFDQ_A0==74
TrainedVREFDQ_A1==74
VrefDac_Margin_A0==25
DeviceVref_Margin_A0==40
VrefDac_Margin_A1==24
DeviceVref_Margin_A1==40

dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004

soc_vref_reg_value 0x 00000015 00000015 00000013 00000015 00000015 00000015 000f
2D init succeed
ddr init done, boot next stage
result report
aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:53:31
auto size-- 65535DDR cs0 size: 2048MB
DDR cs1 size: 2048MB
DMC_DDR_CTRL: 00e00024DDR size: 3928MB
cs0 DataBus test pass
cs1 DataBus test pass
cs0 AddrBus test pass
cs1 AddrBus test pass

#16

So right now it really looks like hardware issue. Just as a sanity check before filing RMA, can you try boot-g12.py with a different USB cable and ideally a different computer? Also can you try checking if running Linux from microSD is possible. I don’t have high hope for either of them so if both failed I think you should return the board.

#17

I have tried using Debian 11 running on bare metal, Ubuntu 20.04 as a VM, and Windows 10. The two Linux machines return the same result with some error messaging. The windows machine runs until it fails and then hangs.

The device won’t boot from from an SD card.

I suspected the device was toast. Thanks for your help and confirmation. We gave it a shot.

#18

The folks at Ameridroid were great. My new Zero arrived a few weeks ago. Ubuntu 20.04 is now up and running on the EMMC.

Thanks for your help.