Dw-apb-uart ff0a0000.serial: set rate:3686400, but get rate:3428572

ROCK Pi Series Using ROCK Pi S
1 
[    0.199149] Serial: 8250/16550 driver, 5 ports, IRQ sharing disabled
[    0.201430] console [ttyS0] disabled
[    0.201514] ff0a0000.serial: ttyS0 at MMIO 0xff0a0000 (irq = 10, base_baud = 1500000) is a 16550A
[    0.201693] clk_uart0_frac parent_rate(24000000) is low than rate(3686400)*20, fractional div is not allowed
[    0.201789] clk_uart0_frac parent_rate(24000000) is low than rate(3760128)*20, fractional div is not allowed
[    0.201811] dw-apb-uart ff0a0000.serial: set rate:3686400, but get rate:3428572
[    1.240605] console [ttyS0] enabled

how to get 115200 baudrate?
Should I change ff0a0000.serial’s clock source?

2

Problem solved, solution:

Change code in drivers/tty/serial/8250/8250_dw.c/dw8250_set_termios() from:

#ifdef CONFIG_ARCH_ROCKCHIP
	if ((baud * 16) <= 4000000) {
		/*
		 * Make sure uart sclk is high enough
		 */
		div = 4000000 / baud / 16;
		rate = baud * 16 * div;
	} else {
		rate = baud * 16;
	}

	ret = clk_set_rate(d->clk, rate);
	rate_temp = clk_get_rate(d->clk);
	diff = rate * 20 / 1000;
	/*
	 * If rate_temp is not equal to rate, is means fractional frequency
	 * division is failed. Then use Integer frequency division, and
	 * the buad rate error must be under -+2%
	 */
	if ((rate_temp < rate) && ((rate - rate_temp) > diff)) {
		ret = clk_set_rate(d->clk, rate + diff);
		rate_temp = clk_get_rate(d->clk);
		if ((rate_temp < rate) && ((rate - rate_temp) > diff))
			dev_info(p->dev, "set rate:%d, but get rate:%d\n",
				 rate, rate_temp);
		else if ((rate < rate_temp) && ((rate_temp - rate) > diff))
			dev_info(p->dev, "set rate:%d, but get rate:%d\n",
				 rate, rate_temp);
	}
#else

to:

#ifdef CONFIG_ARCH_ROCKCHIP
	rate = clk_get_rate(clk_get_parent(d->clk));
	ret = clk_set_rate(d->clk, rate);
#else