Dual 2.5G Router HAT - FPC Connector use

geerlingguy · February 24, 2025, 11:17pm

I have a couple of the latest models of the Dual 2.5G Router HAT that I’m testing in my Pi PCIe Devices repo.

Almost everything is working flawlessly, however I am trying to get one more PCIe device working through the external PCIe FPC, and cannot.

I tried plugging in my Pineboards FFC in both orientations (the way as pictured above, which I believe is wrong, and the other way around, which is how I think the contacts should be).

But in no case does lspci show the WiFi card on the board, nor do I see the ‘PWR’ LED light up on the Pineboards HAT.

I’m going to test some other HATs as well, but just to be sure—does the FPC provide 5V power like the FPC on the Pi 5 itself does? Or would I need to use a HAT with a separate 5V power input? Or could I just have a bad connector, or have gotten unlucky with cabling? I’m going to do some other tests too like swapping to a shorter FFC.

geerlingguy · February 24, 2025, 11:29pm

I’ve now tested three different HATs, with three different FFCs, in both orientations, and even the uPCIty Lite with an external 12V input. None of these HATs were identified, and none of them had their PWR LED light up, so it seems like either this particular Dual 2.5G HAT has a dead FPC, or maybe power isn’t routed to it correctly.

I will try with the other production sample I was sent, just to confirm.

Mitchell · February 25, 2025, 2:11am

Hi @geerlingguy, below is my explanation of the FPC issue.

To ask you first, did you test both of your board FPCs to see if they both have the same problem?
The two boards we sent you I tested all the interfaces and they work fine.

My test environment

BOARD : Raspberry Pi 5
OS : Raspberry Pi OS 64-bit (Debian Bookworm)
Adapter Board : Dual 2.5G Router HAT (V1.4)

First of all, the FPC connector on the Dual 2.5G Router HAT provides a 5V power supply.

For testing, I used a Waveshare adapter board.

Correct Connection Method:

After the system boots up, I can successfully detect the NVMe device (I am booting from SSD).

[图片]

Mitchell · February 25, 2025, 2:34am

Below is the schematic diagram of the FPC interface:

Can you confirm that your FPC cable is functioning properly? Please check the wiring sequence or test whether the FPC connector on the Dual 2.5G Router HAT has a 5V power output on pins 1 and 2, and whether pin 16 (reset pin) has a 3.3V power output.

If the power output is not normal, please let us know, and we will send you a new board.

geerlingguy · February 25, 2025, 3:11am

Thank you! I will test again with another HAT, and check with my voltmeter on the correct pins as well, to see if they are providing the voltage.

I tried the other HAT under the same test scenarios, I’m wondering if there could be something else strange in my setup, sometimes just getting some sleep and trying again will fix the issue, since my brain my have just been stuck in a rut!

Kind of like when I was testing both 2.5 Gbps interfaces… and seeing only 2.5 Gbps of bandwidth because I wast testing over a single 2.5 Gbps switch connected to the rest of my network

geerlingguy · February 25, 2025, 4:12pm

Here’s how I’m plugging in other HATs (I’ve now tested a Pineboards Coral Edge TPU HAT, Raspberry Pi M.2 HAT+, and Pineboards uPCIty Lite. I will check the pins next to see if 5V is just not making it out from the FPC…

geerlingguy · February 25, 2025, 4:22pm

Checking the voltages, I do see 5V on the first two pins, and 3.3V on the last:

Now I’m scratching my head as to why none of these boards are working!

geerlingguy · February 25, 2025, 4:32pm

Finally, I dug out this HackerGadgets HAT, which includes a nice silkscreen on the FFC to show HAT / Pi 5 side, which let me confirm the 5v path was correct at least…

And I get a power LED but I don’t get NVMe activity. I noticed the NVMe doesn’t seat nicely in the M.2 connector though, so I’m wondering if that connector is bad, ah the joys of so many connections to test

But at least since I know I’m getting power, I may be getting mixed up with all the different HATs and cables having different signal routing — I know Raspberry Pi’s HAT+ FFC has its pins on opposite sides, compared to most of the cheaper FFCs have the pins on the same side on both ends… maybe that’s throwing off the connections on the HAT side for all these HATs?

geerlingguy · February 25, 2025, 4:44pm

I’ve now tested the AI HAT+ as well, and tried other Pineboards HATs with the HackerGadgets cable, but they did not light up the power LEDs or get recognized with lspci either.

I also reseated the M.2 NVMe drive in the HackerGadgets HAT two times, and it still never got recognized.

Could it be possible it’s providing 5V but not at enough current for the device installed on the HAT to actually power up?

Mitchell · February 26, 2025, 2:20am

Hi @geerlingguy , Let’s do an experiment to verify the integrity of the FPC interface.

Connect another Dual 2.5G Router HAT to the FPC of the Dual 2.5G Router HAT like on the picture below.

[图片]

Of course the other Dual 2.5G Router HAT needs to be powered additionally.

The system will normally boot up with four R8125 devices and two NVM devices.

In the meantime, we will send you another board that is tested properly on my end for you to test.

Mitchell · February 26, 2025, 9:44am

Hi @geerlingguy

We have sent you another board that has been fully tested and confirmed to work with the FPC.

One more question—can you tell me the configuration inside your EEPROM?

I’m concerned that the EEPROM settings might be affecting the detection. You could try clearing the EEPROM to test whether the HAT device is recognized properly.

geerlingguy · February 26, 2025, 5:24pm

Here is my current EEPROM config (sudo rpi-eeprom-config -e):

[all]
BOOT_UART=1
BOOT_ORDER=0xf146
WAKE_ON_GPIO=0
POWER_OFF_ON_HALT=1
SDRAM_BANKLOW=1
PCIE_PROBE=1

With both boards connected and powered, I am seeing two PCIe switches, but none of the downstream devices except for the NVMe drive (none of the Ethernet ports connected are listed):

pi@pi5-router:~ $ lspci
0000:00:00.0 PCI bridge: Broadcom Inc. and subsidiaries BCM2712 PCIe Bridge (rev 21)
0000:01:00.0 PCI bridge: ASMedia Technology Inc. ASM2806 4-Port PCIe x2 Gen3 Packet Switch (rev 01)
0000:02:00.0 PCI bridge: ASMedia Technology Inc. ASM2806 4-Port PCIe x2 Gen3 Packet Switch (rev 01)
0000:02:02.0 PCI bridge: ASMedia Technology Inc. ASM2806 4-Port PCIe x2 Gen3 Packet Switch (rev 01)
0000:02:06.0 PCI bridge: ASMedia Technology Inc. ASM2806 4-Port PCIe x2 Gen3 Packet Switch (rev 01)
0000:02:0e.0 PCI bridge: ASMedia Technology Inc. ASM2806 4-Port PCIe x2 Gen3 Packet Switch (rev 01)
0000:03:00.0 Non-Volatile memory controller: SK hynix Gold P31/PC711 NVMe Solid State Drive
0000:04:00.0 PCI bridge: ASMedia Technology Inc. ASM2806 4-Port PCIe x2 Gen3 Packet Switch (rev 01)
0000:05:00.0 PCI bridge: ASMedia Technology Inc. ASM2806 4-Port PCIe x2 Gen3 Packet Switch (rev 01)
0000:05:02.0 PCI bridge: ASMedia Technology Inc. ASM2806 4-Port PCIe x2 Gen3 Packet Switch (rev 01)
0000:05:06.0 PCI bridge: ASMedia Technology Inc. ASM2806 4-Port PCIe x2 Gen3 Packet Switch (rev 01)
0000:05:0e.0 PCI bridge: ASMedia Technology Inc. ASM2806 4-Port PCIe x2 Gen3 Packet Switch (rev 01)
0001:00:00.0 PCI bridge: Broadcom Inc. and subsidiaries BCM2712 PCIe Bridge (rev 21)
0001:01:00.0 Ethernet controller: Raspberry Pi Ltd RP1 PCIe 2.0 South Bridge

I did see some PCI bus issues noted in dmesg logs:

Click to expand

pi@pi5-router:~ $ dmesg | grep pci
[    0.000000] Kernel command line: reboot=w coherent_pool=1M 8250.nr_uarts=1 pci=pcie_bus_safe cgroup_disable=memory numa_policy=interleave  numa=fake=8 system_heap.max_order=0 smsc95xx.macaddr=D8:3A:DD:84:FB:3A vc_mem.mem_base=0x3fc00000 vc_mem.mem_size=0x40000000  console=ttyAMA10,115200 console=tty1 root=PARTUUID=78573923-02 rootfstype=ext4 fsck.repair=yes rootwait quiet splash plymouth.ignore-serial-consoles cfg80211.ieee80211_regdom=US
[    0.024833] /axi/pcie@120000/rp1: Fixed dependency cycle(s) with /axi/pcie@120000/rp1
[    0.025073] /axi/pcie@120000/rp1: Fixed dependency cycle(s) with /axi/pcie@120000/rp1
[    0.283569] brcm-pcie 1000110000.pcie: host bridge /axi/pcie@110000 ranges:
[    0.283575] brcm-pcie 1000110000.pcie:   No bus range found for /axi/pcie@110000, using [bus 00-ff]
[    0.283584] brcm-pcie 1000110000.pcie:      MEM 0x1b80000000..0x1bffffffff -> 0x0080000000
[    0.283588] brcm-pcie 1000110000.pcie:      MEM 0x1800000000..0x1b7fffffff -> 0x0400000000
[    0.283592] brcm-pcie 1000110000.pcie:   IB MEM 0x0000000000..0x0fffffffff -> 0x1000000000
[    0.284932] brcm-pcie 1000110000.pcie: Forcing gen 3
[    0.285070] brcm-pcie 1000110000.pcie: PCI host bridge to bus 0000:00
[    0.285072] pci_bus 0000:00: root bus resource [bus 00-ff]
[    0.285076] pci_bus 0000:00: root bus resource [mem 0x1b80000000-0x1bffffffff] (bus address [0x80000000-0xffffffff])
[    0.285078] pci_bus 0000:00: root bus resource [mem 0x1800000000-0x1b7fffffff pref] (bus address [0x400000000-0x77fffffff])
[    0.285088] pci 0000:00:00.0: [14e4:2712] type 01 class 0x060400
[    0.285108] pci 0000:00:00.0: PME# supported from D0 D3hot
[    0.393364] brcm-pcie 1000110000.pcie: link up, 8.0 GT/s PCIe x1 (!SSC)
[    0.393407] pci 0000:01:00.0: [1b21:2806] type 01 class 0x060400
[    0.393443] pci 0000:01:00.0: enabling Extended Tags
[    0.393510] pci 0000:01:00.0: PME# supported from D0 D3hot D3cold
[    0.393548] pci 0000:01:00.0: 7.876 Gb/s available PCIe bandwidth, limited by 8.0 GT/s PCIe x1 link at 0000:00:00.0 (capable of 15.752 Gb/s with 8.0 GT/s PCIe x2 link)
[    0.405368] pci 0000:01:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    0.405438] pci 0000:02:00.0: [1b21:2806] type 01 class 0x060400
[    0.405474] pci 0000:02:00.0: enabling Extended Tags
[    0.405537] pci 0000:02:00.0: PME# supported from D0 D3hot D3cold
[    0.405807] pci 0000:02:02.0: [1b21:2806] type 01 class 0x060400
[    0.405843] pci 0000:02:02.0: enabling Extended Tags
[    0.405906] pci 0000:02:02.0: PME# supported from D0 D3hot D3cold
[    0.406065] pci 0000:02:06.0: [1b21:2806] type 01 class 0x060400
[    0.406100] pci 0000:02:06.0: enabling Extended Tags
[    0.406163] pci 0000:02:06.0: PME# supported from D0 D3hot D3cold
[    0.406377] pci 0000:02:0e.0: [1b21:2806] type 01 class 0x060400
[    0.406412] pci 0000:02:0e.0: enabling Extended Tags
[    0.406475] pci 0000:02:0e.0: PME# supported from D0 D3hot D3cold
[    0.406835] pci 0000:02:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    0.406841] pci 0000:02:02.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    0.406847] pci 0000:02:06.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    0.406853] pci 0000:02:0e.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    0.406915] pci 0000:03:00.0: [1c5c:174a] type 00 class 0x010802
[    0.406938] pci 0000:03:00.0: reg 0x10: [mem 0x00000000-0x00003fff 64bit]
[    0.406946] pci 0000:03:00.0: reg 0x18: [mem 0x00000000-0x00000fff]
[    0.406954] pci 0000:03:00.0: reg 0x1c: [mem 0x00000000-0x00000fff]
[    0.407143] pci 0000:03:00.0: 7.876 Gb/s available PCIe bandwidth, limited by 8.0 GT/s PCIe x1 link at 0000:00:00.0 (capable of 31.504 Gb/s with 8.0 GT/s PCIe x4 link)
[    0.417378] pci_bus 0000:03: busn_res: [bus 03-06] end is updated to 03
[    0.417438] pci 0000:04:00.0: [1b21:2806] type 01 class 0x060400
[    0.417491] pci 0000:04:00.0: enabling Extended Tags
[    0.417584] pci 0000:04:00.0: PME# supported from D0 D3hot D3cold
[    0.417641] pci 0000:04:00.0: 7.876 Gb/s available PCIe bandwidth, limited by 8.0 GT/s PCIe x1 link at 0000:00:00.0 (capable of 63.008 Gb/s with 8.0 GT/s PCIe x8 link)
[    0.429368] pci 0000:04:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    0.429443] pci 0000:05:00.0: [1b21:2806] type 01 class 0x060400
[    0.429498] pci 0000:05:00.0: enabling Extended Tags
[    0.429599] pci 0000:05:00.0: PME# supported from D0 D3hot D3cold
[    0.429766] pci 0000:05:02.0: [1b21:2806] type 01 class 0x060400
[    0.429821] pci 0000:05:02.0: enabling Extended Tags
[    0.429922] pci 0000:05:02.0: PME# supported from D0 D3hot D3cold
[    0.430111] pci 0000:05:06.0: [1b21:2806] type 01 class 0x060400
[    0.430165] pci 0000:05:06.0: enabling Extended Tags
[    0.430266] pci 0000:05:06.0: PME# supported from D0 D3hot D3cold
[    0.430518] pci 0000:05:0e.0: [1b21:2806] type 01 class 0x060400
[    0.430573] pci 0000:05:0e.0: enabling Extended Tags
[    0.430673] pci 0000:05:0e.0: PME# supported from D0 D3hot D3cold
[    0.431070] pci 0000:05:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    0.431078] pci 0000:05:02.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    0.431086] pci 0000:05:06.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    0.431095] pci 0000:05:0e.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    0.431169] pci_bus 0000:06: busn_res: [bus 06] end is updated to 06
[    0.431220] pci_bus 0000:07: busn_res: can not insert [bus 07-06] under [bus 05-06] (conflicts with (null) [bus 05-06])
[    0.431241] pci_bus 0000:07: busn_res: [bus 07-06] end is updated to 07
[    0.431243] pci_bus 0000:07: busn_res: can not insert [bus 07] under [bus 05-06] (conflicts with (null) [bus 05-06])
[    0.431245] pci 0000:05:02.0: devices behind bridge are unusable because [bus 07] cannot be assigned for them
[    0.431295] pci_bus 0000:08: busn_res: can not insert [bus 08-06] under [bus 05-06] (conflicts with (null) [bus 05-06])
[    0.431315] pci_bus 0000:08: busn_res: [bus 08-06] end is updated to 08
[    0.431317] pci_bus 0000:08: busn_res: can not insert [bus 08] under [bus 05-06] (conflicts with (null) [bus 05-06])
[    0.431319] pci 0000:05:06.0: devices behind bridge are unusable because [bus 08] cannot be assigned for them
[    0.431369] pci_bus 0000:09: busn_res: can not insert [bus 09-06] under [bus 05-06] (conflicts with (null) [bus 05-06])
[    0.431389] pci_bus 0000:09: busn_res: [bus 09-06] end is updated to 09
[    0.431391] pci_bus 0000:09: busn_res: can not insert [bus 09] under [bus 05-06] (conflicts with (null) [bus 05-06])
[    0.431393] pci 0000:05:0e.0: devices behind bridge are unusable because [bus 09] cannot be assigned for them
[    0.431396] pci_bus 0000:05: busn_res: [bus 05-06] end can not be updated to 09
[    0.431401] pci_bus 0000:04: busn_res: [bus 04-06] end can not be updated to 09
[    0.431437] pci_bus 0000:0a: busn_res: can not insert [bus 0a-06] under [bus 02-06] (conflicts with (null) [bus 02-06])
[    0.431456] pci_bus 0000:0a: busn_res: [bus 0a-06] end is updated to 0a
[    0.431458] pci_bus 0000:0a: busn_res: can not insert [bus 0a] under [bus 02-06] (conflicts with (null) [bus 02-06])
[    0.431460] pci 0000:02:06.0: devices behind bridge are unusable because [bus 0a] cannot be assigned for them
[    0.431495] pci_bus 0000:0b: busn_res: can not insert [bus 0b-06] under [bus 02-06] (conflicts with (null) [bus 02-06])
[    0.431514] pci_bus 0000:0b: busn_res: [bus 0b-06] end is updated to 0b
[    0.431516] pci_bus 0000:0b: busn_res: can not insert [bus 0b] under [bus 02-06] (conflicts with (null) [bus 02-06])
[    0.431518] pci 0000:02:0e.0: devices behind bridge are unusable because [bus 0b] cannot be assigned for them
[    0.431520] pci_bus 0000:02: busn_res: [bus 02-06] end can not be updated to 0b
[    0.431524] pci 0000:00:00.0: bridge has subordinate 06 but max busn 0b
[    0.431535] pci 0000:00:00.0: BAR 8: assigned [mem 0x1b80000000-0x1b800fffff]
[    0.431537] pci 0000:01:00.0: BAR 8: assigned [mem 0x1b80000000-0x1b800fffff]
[    0.431540] pci 0000:02:00.0: BAR 8: assigned [mem 0x1b80000000-0x1b800fffff]
[    0.431542] pci 0000:03:00.0: BAR 0: assigned [mem 0x1b80000000-0x1b80003fff 64bit]
[    0.431554] pci 0000:03:00.0: BAR 2: assigned [mem 0x1b80004000-0x1b80004fff]
[    0.431558] pci 0000:03:00.0: BAR 3: assigned [mem 0x1b80005000-0x1b80005fff]
[    0.431563] pci 0000:02:00.0: PCI bridge to [bus 03]
[    0.431567] pci 0000:02:00.0:   bridge window [mem 0x1b80000000-0x1b800fffff]
[    0.431573] pci 0000:05:00.0: PCI bridge to [bus 06]
[    0.431585] pci 0000:05:02.0: PCI bridge to [bus 07]
[    0.431598] pci 0000:05:06.0: PCI bridge to [bus 08]
[    0.431611] pci 0000:05:0e.0: PCI bridge to [bus 09]
[    0.431624] pci 0000:04:00.0: PCI bridge to [bus 05-06]
[    0.431637] pci 0000:02:02.0: PCI bridge to [bus 04-06]
[    0.431645] pci 0000:02:06.0: PCI bridge to [bus 0a]
[    0.431654] pci 0000:02:0e.0: PCI bridge to [bus 0b]
[    0.431663] pci 0000:01:00.0: PCI bridge to [bus 02-06]
[    0.431666] pci 0000:01:00.0:   bridge window [mem 0x1b80000000-0x1b800fffff]
[    0.431672] pci 0000:00:00.0: PCI bridge to [bus 01-06]
[    0.431674] pci 0000:00:00.0:   bridge window [mem 0x1b80000000-0x1b800fffff]
[    0.431678] pci 0000:00:00.0: Max Payload Size set to  512/ 512 (was  128), Max Read Rq  512
[    0.431684] pci 0000:01:00.0: Max Payload Size set to  512/ 512 (was  128), Max Read Rq  512
[    0.431690] pci 0000:02:00.0: Max Payload Size set to  512/ 512 (was  128), Max Read Rq  512
[    0.431699] pci 0000:03:00.0: Max Payload Size set to  512/ 512 (was  128), Max Read Rq  512
[    0.431705] pci 0000:02:02.0: Max Payload Size set to  512/ 512 (was  128), Max Read Rq  512
[    0.431713] pci 0000:04:00.0: Max Payload Size set to  512/ 512 (was  128), Max Read Rq  512
[    0.431722] pci 0000:05:00.0: Max Payload Size set to  512/ 512 (was  128), Max Read Rq  512
[    0.431730] pci 0000:05:02.0: Max Payload Size set to  512/ 512 (was  128), Max Read Rq  512
[    0.431738] pci 0000:05:06.0: Max Payload Size set to  512/ 512 (was  128), Max Read Rq  512
[    0.431747] pci 0000:05:0e.0: Max Payload Size set to  512/ 512 (was  128), Max Read Rq  512
[    0.431752] pci 0000:02:06.0: Max Payload Size set to  512/ 512 (was  128), Max Read Rq  512
[    0.431758] pci 0000:02:0e.0: Max Payload Size set to  512/ 512 (was  128), Max Read Rq  512
[    0.431846] pcieport 0000:00:00.0: enabling device (0000 -> 0002)
[    0.431879] pcieport 0000:00:00.0: PME: Signaling with IRQ 38
[    0.432034] pcieport 0000:00:00.0: AER: enabled with IRQ 38
[    0.432087] pcieport 0000:01:00.0: enabling device (0000 -> 0002)
[    0.432159] pcieport 0000:02:00.0: enabling device (0000 -> 0002)
[    0.432690] nvme nvme0: pci function 0000:03:00.0
[    0.469551] brcm-pcie 1000110000.pcie: clkreq control enabled
[    0.469604] brcm-pcie 1000120000.pcie: host bridge /axi/pcie@120000 ranges:
[    0.469607] brcm-pcie 1000120000.pcie:   No bus range found for /axi/pcie@120000, using [bus 00-ff]
[    0.469613] brcm-pcie 1000120000.pcie:      MEM 0x1f00000000..0x1ffffffffb -> 0x0000000000
[    0.469617] brcm-pcie 1000120000.pcie:      MEM 0x1c00000000..0x1effffffff -> 0x0400000000
[    0.469621] brcm-pcie 1000120000.pcie:   IB MEM 0x1f00000000..0x1f003fffff -> 0x0000000000
[    0.469625] brcm-pcie 1000120000.pcie:   IB MEM 0x0000000000..0x0fffffffff -> 0x1000000000
[    0.470686] brcm-pcie 1000120000.pcie: Forcing gen 2
[    0.470710] brcm-pcie 1000120000.pcie: PCI host bridge to bus 0001:00
[    0.470712] pci_bus 0001:00: root bus resource [bus 00-ff]
[    0.470714] pci_bus 0001:00: root bus resource [mem 0x1f00000000-0x1ffffffffb] (bus address [0x00000000-0xfffffffb])
[    0.470717] pci_bus 0001:00: root bus resource [mem 0x1c00000000-0x1effffffff pref] (bus address [0x400000000-0x6ffffffff])
[    0.470723] pci 0001:00:00.0: [14e4:2712] type 01 class 0x060400
[    0.470739] pci 0001:00:00.0: PME# supported from D0 D3hot
[    0.471313] pci 0001:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    0.577357] brcm-pcie 1000120000.pcie: link up, 5.0 GT/s PCIe x4 (!SSC)
[    0.577374] pci 0001:01:00.0: [1de4:0001] type 00 class 0x020000
[    0.577386] pci 0001:01:00.0: reg 0x10: [mem 0xffffc000-0xffffffff]
[    0.577392] pci 0001:01:00.0: reg 0x14: [mem 0xffc00000-0xffffffff]
[    0.577398] pci 0001:01:00.0: reg 0x18: [mem 0xffff0000-0xffffffff]
[    0.577459] pci 0001:01:00.0: supports D1
[    0.577461] pci 0001:01:00.0: PME# supported from D0 D1 D3hot D3cold
[    0.589363] pci_bus 0001:01: busn_res: [bus 01-ff] end is updated to 01
[    0.589370] pci 0001:00:00.0: BAR 8: assigned [mem 0x1f00000000-0x1f005fffff]
[    0.589373] pci 0001:01:00.0: BAR 1: assigned [mem 0x1f00000000-0x1f003fffff]
[    0.589377] pci 0001:01:00.0: BAR 2: assigned [mem 0x1f00400000-0x1f0040ffff]
[    0.589381] pci 0001:01:00.0: BAR 0: assigned [mem 0x1f00410000-0x1f00413fff]
[    0.589385] pci 0001:00:00.0: PCI bridge to [bus 01]
[    0.589387] pci 0001:00:00.0:   bridge window [mem 0x1f00000000-0x1f005fffff]
[    0.589390] pci 0001:00:00.0: Max Payload Size set to  256/ 512 (was  128), Max Read Rq  512
[    0.589397] pci 0001:01:00.0: Max Payload Size set to  256/ 256 (was  128), Max Read Rq  512
[    0.589428] pcieport 0001:00:00.0: enabling device (0000 -> 0002)
[    0.589447] pcieport 0001:00:00.0: PME: Signaling with IRQ 48
[    0.589509] pcieport 0001:00:00.0: AER: enabled with IRQ 48

I’ve tried with both dtparam=pciex1_gen=2 and dtparam=pciex1_gen=1 in my /boot/firmware/config.txt, same result.

And just unplugging the 2nd Dual 2.5G HAT allows the first two ports to enumerate again:

pi@pi5-router:~ $ lspci
0000:00:00.0 PCI bridge: Broadcom Inc. and subsidiaries BCM2712 PCIe Bridge (rev 21)
0000:01:00.0 PCI bridge: ASMedia Technology Inc. ASM2806 4-Port PCIe x2 Gen3 Packet Switch (rev 01)
0000:02:00.0 PCI bridge: ASMedia Technology Inc. ASM2806 4-Port PCIe x2 Gen3 Packet Switch (rev 01)
0000:02:02.0 PCI bridge: ASMedia Technology Inc. ASM2806 4-Port PCIe x2 Gen3 Packet Switch (rev 01)
0000:02:06.0 PCI bridge: ASMedia Technology Inc. ASM2806 4-Port PCIe x2 Gen3 Packet Switch (rev 01)
0000:02:0e.0 PCI bridge: ASMedia Technology Inc. ASM2806 4-Port PCIe x2 Gen3 Packet Switch (rev 01)
0000:03:00.0 Non-Volatile memory controller: SK hynix Gold P31/PC711 NVMe Solid State Drive
0000:05:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8125 2.5GbE Controller (rev 05)
0000:06:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8125 2.5GbE Controller (rev 05)
0001:00:00.0 PCI bridge: Broadcom Inc. and subsidiaries BCM2712 PCIe Bridge (rev 21)
0001:01:00.0 Ethernet controller: Raspberry Pi Ltd RP1 PCIe 2.0 South Bridge

geerlingguy · February 26, 2025, 5:19pm

A picture of the setup:

Separately: do you sell the FFC cables separately? I only have three, and one is in use on my Penta SATA Pi NAS build, the other two are now on this project, but I like to have a couple spares just in case!

Mitchell · February 27, 2025, 1:50am

Hi @geerlingguy

Yes, I included two new FPC cable arrangements for you.

It looks like the PCIe recognizes the ASM2806 device after you hook up another Dual 2.5G HAT.

Is the software you are testing with the latest release of the Raspberry Pi? The image I’m using is from the 2024-11-19 release.

geerlingguy · March 3, 2025, 6:03pm

I flashed the latest version of Raspberry Pi OS (Bookworm, Lite) using Raspberry Pi Imager, and ran sudo apt update && sudo apt -y upgrade then rebooted before I started my testing, so packages should be up to date as of a week or so ago.

I just received the new fully tested board in the mail this morning. I have plugged it in using one of the two new FPC cables (thanks for including them!), and so far so good on the board itself:

$ lspci
0000:00:00.0 PCI bridge: Broadcom Inc. and subsidiaries BCM2712 PCIe Bridge (rev 21)
0000:01:00.0 PCI bridge: ASMedia Technology Inc. ASM2806 4-Port PCIe x2 Gen3 Packet Switch (rev 01)
0000:02:00.0 PCI bridge: ASMedia Technology Inc. ASM2806 4-Port PCIe x2 Gen3 Packet Switch (rev 01)
0000:02:02.0 PCI bridge: ASMedia Technology Inc. ASM2806 4-Port PCIe x2 Gen3 Packet Switch (rev 01)
0000:02:06.0 PCI bridge: ASMedia Technology Inc. ASM2806 4-Port PCIe x2 Gen3 Packet Switch (rev 01)
0000:02:0e.0 PCI bridge: ASMedia Technology Inc. ASM2806 4-Port PCIe x2 Gen3 Packet Switch (rev 01)
0000:03:00.0 Non-Volatile memory controller: SK hynix Gold P31/PC711 NVMe Solid State Drive
0000:05:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8125 2.5GbE Controller (rev 05)
0000:06:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8125 2.5GbE Controller (rev 05)
0001:00:00.0 PCI bridge: Broadcom Inc. and subsidiaries BCM2712 PCIe Bridge (rev 21)
0001:01:00.0 Ethernet controller: Raspberry Pi Ltd RP1 PCIe 2.0 South Bridge

Next up I’ll test a HAT on the external FPC again…

geerlingguy · March 3, 2025, 6:35pm

No PWR LED on the HAT I tested just now and it didn’t show up with lspci. Next up I’m going to disconnect the NVMe SSD and boot from microSD, just to see if that makes any difference — it did not.

I also plugged in another Radxa Dual 2.5G HAT, and I can see both PCIe switches, but none of the downstream 2.5 Gbps NICs:

$ lspci
0000:00:00.0 PCI bridge: Broadcom Inc. and subsidiaries BCM2712 PCIe Bridge (rev 21)
0000:01:00.0 PCI bridge: ASMedia Technology Inc. ASM2806 4-Port PCIe x2 Gen3 Packet Switch (rev 01)
0000:02:00.0 PCI bridge: ASMedia Technology Inc. ASM2806 4-Port PCIe x2 Gen3 Packet Switch (rev 01)
0000:02:02.0 PCI bridge: ASMedia Technology Inc. ASM2806 4-Port PCIe x2 Gen3 Packet Switch (rev 01)
0000:02:06.0 PCI bridge: ASMedia Technology Inc. ASM2806 4-Port PCIe x2 Gen3 Packet Switch (rev 01)
0000:02:0e.0 PCI bridge: ASMedia Technology Inc. ASM2806 4-Port PCIe x2 Gen3 Packet Switch (rev 01)
0000:04:00.0 PCI bridge: ASMedia Technology Inc. ASM2806 4-Port PCIe x2 Gen3 Packet Switch (rev 01)
0000:05:00.0 PCI bridge: ASMedia Technology Inc. ASM2806 4-Port PCIe x2 Gen3 Packet Switch (rev 01)
0000:05:02.0 PCI bridge: ASMedia Technology Inc. ASM2806 4-Port PCIe x2 Gen3 Packet Switch (rev 01)
0000:05:06.0 PCI bridge: ASMedia Technology Inc. ASM2806 4-Port PCIe x2 Gen3 Packet Switch (rev 01)
0000:05:0e.0 PCI bridge: ASMedia Technology Inc. ASM2806 4-Port PCIe x2 Gen3 Packet Switch (rev 01)
0001:00:00.0 PCI bridge: Broadcom Inc. and subsidiaries BCM2712 PCIe Bridge (rev 21)
0001:01:00.0 Ethernet controller: Raspberry Pi Ltd RP1 PCIe 2.0 South Bridge

The current Pi firmware:

$ vcgencmd version
2025/02/12 10:51:52 
Copyright (c) 2012 Broadcom
version f788aab6 (release) (embedded)

$ sudo rpi-eeprom-update
BOOTLOADER: up to date
   CURRENT: Wed 12 Feb 10:51:52 UTC 2025 (1739357512)
    LATEST: Wed 12 Feb 10:51:52 UTC 2025 (1739357512)
   RELEASE: default (/usr/lib/firmware/raspberrypi/bootloader-2712/default)
            Use raspi-config to change the release.

I’m wondering if maybe you are testing with a different firmware release? I may have used this Pi for some PCIe testing in February, which would explain the slightly newer firmware. See EEPROM release notes.

I’ll see if I can grab one of my other Pis and swap it out to see if an older release or some other hardware difference helps…

geerlingguy · March 3, 2025, 6:54pm

Trying on another Pi 5 8GB with slightly older firmware:

$ vcgencmd version
2024/12/07 12:42:23 
Copyright (c) 2012 Broadcom
version 3858f977 (release) (embedded)

$ lspci
0000:00:00.0 PCI bridge: Broadcom Inc. and subsidiaries BCM2712 PCIe Bridge (rev 21)
0000:01:00.0 PCI bridge: ASMedia Technology Inc. ASM2806 4-Port PCIe x2 Gen3 Packet Switch (rev 01)
0000:02:00.0 PCI bridge: ASMedia Technology Inc. ASM2806 4-Port PCIe x2 Gen3 Packet Switch (rev 01)
0000:02:02.0 PCI bridge: ASMedia Technology Inc. ASM2806 4-Port PCIe x2 Gen3 Packet Switch (rev 01)
0000:02:06.0 PCI bridge: ASMedia Technology Inc. ASM2806 4-Port PCIe x2 Gen3 Packet Switch (rev 01)
0000:02:0e.0 PCI bridge: ASMedia Technology Inc. ASM2806 4-Port PCIe x2 Gen3 Packet Switch (rev 01)
0000:04:00.0 PCI bridge: ASMedia Technology Inc. ASM2806 4-Port PCIe x2 Gen3 Packet Switch (rev 01)
0000:05:00.0 PCI bridge: ASMedia Technology Inc. ASM2806 4-Port PCIe x2 Gen3 Packet Switch (rev 01)
0000:05:02.0 PCI bridge: ASMedia Technology Inc. ASM2806 4-Port PCIe x2 Gen3 Packet Switch (rev 01)
0000:05:06.0 PCI bridge: ASMedia Technology Inc. ASM2806 4-Port PCIe x2 Gen3 Packet Switch (rev 01)
0000:05:0e.0 PCI bridge: ASMedia Technology Inc. ASM2806 4-Port PCIe x2 Gen3 Packet Switch (rev 01)
0001:00:00.0 PCI bridge: Broadcom Inc. and subsidiaries BCM2712 PCIe Bridge (rev 21)
0001:01:00.0 Ethernet controller: Raspberry Pi Ltd RP1 PCIe 2.0 South Bridge

Here are the dmesg pcie logs:

[    0.272446] brcm-pcie 1000110000.pcie: host bridge /axi/pcie@110000 ranges:
[    0.272453] brcm-pcie 1000110000.pcie:   No bus range found for /axi/pcie@110000, using [bus 00-ff]
[    0.272462] brcm-pcie 1000110000.pcie:      MEM 0x1b80000000..0x1bffffffff -> 0x0080000000
[    0.272468] brcm-pcie 1000110000.pcie:      MEM 0x1800000000..0x1b7fffffff -> 0x0400000000
[    0.272474] brcm-pcie 1000110000.pcie:   IB MEM 0x0000000000..0x0fffffffff -> 0x1000000000
[    0.273754] brcm-pcie 1000110000.pcie: Forcing gen 2
[    0.273874] brcm-pcie 1000110000.pcie: PCI host bridge to bus 0000:00
[    0.273878] pci_bus 0000:00: root bus resource [bus 00-ff]
[    0.273881] pci_bus 0000:00: root bus resource [mem 0x1b80000000-0x1bffffffff] (bus address [0x80000000-0xffffffff])
[    0.273885] pci_bus 0000:00: root bus resource [mem 0x1800000000-0x1b7fffffff pref] (bus address [0x400000000-0x77fffffff])
[    0.273897] pci 0000:00:00.0: [14e4:2712] type 01 class 0x060400
[    0.273918] pci 0000:00:00.0: PME# supported from D0 D3hot
[    0.381569] brcm-pcie 1000110000.pcie: link up, 5.0 GT/s PCIe x1 (!SSC)
[    0.381592] pci 0000:01:00.0: [1b21:2806] type 01 class 0x060400
[    0.381629] pci 0000:01:00.0: enabling Extended Tags
[    0.381695] pci 0000:01:00.0: PME# supported from D0 D3hot D3cold
[    0.381735] pci 0000:01:00.0: 4.000 Gb/s available PCIe bandwidth, limited by 5.0 GT/s PCIe x1 link at 0000:00:00.0 (capable of 15.752 Gb/s with 8.0 GT/s PCIe x2 link)
[    0.393574] pci 0000:01:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    0.393631] pci 0000:02:00.0: [1b21:2806] type 01 class 0x060400
[    0.393670] pci 0000:02:00.0: enabling Extended Tags
[    0.393736] pci 0000:02:00.0: PME# supported from D0 D3hot D3cold
[    0.393882] pci 0000:02:02.0: [1b21:2806] type 01 class 0x060400
[    0.393921] pci 0000:02:02.0: enabling Extended Tags
[    0.393988] pci 0000:02:02.0: PME# supported from D0 D3hot D3cold
[    0.394148] pci 0000:02:06.0: [1b21:2806] type 01 class 0x060400
[    0.394187] pci 0000:02:06.0: enabling Extended Tags
[    0.394253] pci 0000:02:06.0: PME# supported from D0 D3hot D3cold
[    0.394481] pci 0000:02:0e.0: [1b21:2806] type 01 class 0x060400
[    0.394520] pci 0000:02:0e.0: enabling Extended Tags
[    0.394587] pci 0000:02:0e.0: PME# supported from D0 D3hot D3cold
[    0.394972] pci 0000:02:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    0.394980] pci 0000:02:02.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    0.394987] pci 0000:02:06.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    0.394995] pci 0000:02:0e.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    0.395056] pci_bus 0000:03: busn_res: [bus 03-06] end is updated to 03
[    0.395118] pci 0000:04:00.0: [1b21:2806] type 01 class 0x060400
[    0.395174] pci 0000:04:00.0: enabling Extended Tags
[    0.395271] pci 0000:04:00.0: PME# supported from D0 D3hot D3cold
[    0.395331] pci 0000:04:00.0: 4.000 Gb/s available PCIe bandwidth, limited by 5.0 GT/s PCIe x1 link at 0000:00:00.0 (capable of 15.752 Gb/s with 8.0 GT/s PCIe x2 link)
[    0.405579] pci 0000:04:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    0.405659] pci 0000:05:00.0: [1b21:2806] type 01 class 0x060400
[    0.405717] pci 0000:05:00.0: enabling Extended Tags
[    0.405818] pci 0000:05:00.0: PME# supported from D0 D3hot D3cold
[    0.405994] pci 0000:05:02.0: [1b21:2806] type 01 class 0x060400
[    0.406052] pci 0000:05:02.0: enabling Extended Tags
[    0.406153] pci 0000:05:02.0: PME# supported from D0 D3hot D3cold
[    0.406352] pci 0000:05:06.0: [1b21:2806] type 01 class 0x060400
[    0.406410] pci 0000:05:06.0: enabling Extended Tags
[    0.406511] pci 0000:05:06.0: PME# supported from D0 D3hot D3cold
[    0.406781] pci 0000:05:0e.0: [1b21:2806] type 01 class 0x060400
[    0.406839] pci 0000:05:0e.0: enabling Extended Tags
[    0.406940] pci 0000:05:0e.0: PME# supported from D0 D3hot D3cold
[    0.407368] pci 0000:05:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    0.407378] pci 0000:05:02.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    0.407388] pci 0000:05:06.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    0.407398] pci 0000:05:0e.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    0.407475] pci_bus 0000:06: busn_res: [bus 06] end is updated to 06
[    0.407529] pci_bus 0000:07: busn_res: can not insert [bus 07-06] under [bus 05-06] (conflicts with (null) [bus 05-06])
[    0.407553] pci_bus 0000:07: busn_res: [bus 07-06] end is updated to 07
[    0.407556] pci_bus 0000:07: busn_res: can not insert [bus 07] under [bus 05-06] (conflicts with (null) [bus 05-06])
[    0.407561] pci 0000:05:02.0: devices behind bridge are unusable because [bus 07] cannot be assigned for them
[    0.407614] pci_bus 0000:08: busn_res: can not insert [bus 08-06] under [bus 05-06] (conflicts with (null) [bus 05-06])
[    0.407637] pci_bus 0000:08: busn_res: [bus 08-06] end is updated to 08
[    0.407640] pci_bus 0000:08: busn_res: can not insert [bus 08] under [bus 05-06] (conflicts with (null) [bus 05-06])
[    0.407644] pci 0000:05:06.0: devices behind bridge are unusable because [bus 08] cannot be assigned for them
[    0.407698] pci_bus 0000:09: busn_res: can not insert [bus 09-06] under [bus 05-06] (conflicts with (null) [bus 05-06])
[    0.407721] pci_bus 0000:09: busn_res: [bus 09-06] end is updated to 09
[    0.407724] pci_bus 0000:09: busn_res: can not insert [bus 09] under [bus 05-06] (conflicts with (null) [bus 05-06])
[    0.407728] pci 0000:05:0e.0: devices behind bridge are unusable because [bus 09] cannot be assigned for them
[    0.407733] pci_bus 0000:05: busn_res: [bus 05-06] end can not be updated to 09
[    0.407739] pci_bus 0000:04: busn_res: [bus 04-06] end can not be updated to 09
[    0.407778] pci_bus 0000:0a: busn_res: can not insert [bus 0a-06] under [bus 02-06] (conflicts with (null) [bus 02-06])
[    0.407800] pci_bus 0000:0a: busn_res: [bus 0a-06] end is updated to 0a
[    0.407803] pci_bus 0000:0a: busn_res: can not insert [bus 0a] under [bus 02-06] (conflicts with (null) [bus 02-06])
[    0.407807] pci 0000:02:06.0: devices behind bridge are unusable because [bus 0a] cannot be assigned for them
[    0.407845] pci_bus 0000:0b: busn_res: can not insert [bus 0b-06] under [bus 02-06] (conflicts with (null) [bus 02-06])
[    0.407867] pci_bus 0000:0b: busn_res: [bus 0b-06] end is updated to 0b
[    0.407870] pci_bus 0000:0b: busn_res: can not insert [bus 0b] under [bus 02-06] (conflicts with (null) [bus 02-06])
[    0.407875] pci 0000:02:0e.0: devices behind bridge are unusable because [bus 0b] cannot be assigned for them
[    0.407879] pci_bus 0000:02: busn_res: [bus 02-06] end can not be updated to 0b
[    0.407884] pci 0000:00:00.0: bridge has subordinate 06 but max busn 0b
[    0.407894] pci 0000:02:00.0: PCI bridge to [bus 03]
[    0.407904] pci 0000:05:00.0: PCI bridge to [bus 06]
[    0.407918] pci 0000:05:02.0: PCI bridge to [bus 07]
[    0.407932] pci 0000:05:06.0: PCI bridge to [bus 08]
[    0.407946] pci 0000:05:0e.0: PCI bridge to [bus 09]
[    0.407960] pci 0000:04:00.0: PCI bridge to [bus 05-06]
[    0.407975] pci 0000:02:02.0: PCI bridge to [bus 04-06]
[    0.407985] pci 0000:02:06.0: PCI bridge to [bus 0a]
[    0.407995] pci 0000:02:0e.0: PCI bridge to [bus 0b]
[    0.408005] pci 0000:01:00.0: PCI bridge to [bus 02-06]
[    0.408015] pci 0000:00:00.0: PCI bridge to [bus 01-06]
[    0.408020] pci 0000:00:00.0: Max Payload Size set to  512/ 512 (was  128), Max Read Rq  512
[    0.408028] pci 0000:01:00.0: Max Payload Size set to  512/ 512 (was  128), Max Read Rq  512
[    0.408036] pci 0000:02:00.0: Max Payload Size set to  512/ 512 (was  128), Max Read Rq  512
[    0.408044] pci 0000:02:02.0: Max Payload Size set to  512/ 512 (was  128), Max Read Rq  512
[    0.408055] pci 0000:04:00.0: Max Payload Size set to  512/ 512 (was  128), Max Read Rq  512
[    0.408065] pci 0000:05:00.0: Max Payload Size set to  512/ 512 (was  128), Max Read Rq  512
[    0.408075] pci 0000:05:02.0: Max Payload Size set to  512/ 512 (was  128), Max Read Rq  512
[    0.408085] pci 0000:05:06.0: Max Payload Size set to  512/ 512 (was  128), Max Read Rq  512
[    0.408095] pci 0000:05:0e.0: Max Payload Size set to  512/ 512 (was  128), Max Read Rq  512
[    0.408103] pci 0000:02:06.0: Max Payload Size set to  512/ 512 (was  128), Max Read Rq  512
[    0.408111] pci 0000:02:0e.0: Max Payload Size set to  512/ 512 (was  128), Max Read Rq  512
[    0.408188] pcieport 0000:00:00.0: PME: Signaling with IRQ 38
[    0.408240] pcieport 0000:00:00.0: AER: enabled with IRQ 38
[    0.409472] brcm-pcie 1000110000.pcie: clkreq control enabled
[    0.409515] brcm-pcie 1000120000.pcie: host bridge /axi/pcie@120000 ranges:
[    0.409519] brcm-pcie 1000120000.pcie:   No bus range found for /axi/pcie@120000, using [bus 00-ff]
[    0.409527] brcm-pcie 1000120000.pcie:      MEM 0x1f00000000..0x1ffffffffb -> 0x0000000000
[    0.409532] brcm-pcie 1000120000.pcie:      MEM 0x1c00000000..0x1effffffff -> 0x0400000000
[    0.409539] brcm-pcie 1000120000.pcie:   IB MEM 0x1f00000000..0x1f003fffff -> 0x0000000000
[    0.409544] brcm-pcie 1000120000.pcie:   IB MEM 0x0000000000..0x0fffffffff -> 0x1000000000
[    0.410550] brcm-pcie 1000120000.pcie: Forcing gen 2
[    0.410573] brcm-pcie 1000120000.pcie: PCI host bridge to bus 0001:00
[    0.410577] pci_bus 0001:00: root bus resource [bus 00-ff]
[    0.410580] pci_bus 0001:00: root bus resource [mem 0x1f00000000-0x1ffffffffb] (bus address [0x00000000-0xfffffffb])
[    0.410584] pci_bus 0001:00: root bus resource [mem 0x1c00000000-0x1effffffff pref] (bus address [0x400000000-0x6ffffffff])
[    0.410592] pci 0001:00:00.0: [14e4:2712] type 01 class 0x060400
[    0.410608] pci 0001:00:00.0: PME# supported from D0 D3hot
[    0.411172] pci 0001:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    0.517568] brcm-pcie 1000120000.pcie: link up, 5.0 GT/s PCIe x4 (!SSC)
[    0.517586] pci 0001:01:00.0: [1de4:0001] type 00 class 0x020000
[    0.517600] pci 0001:01:00.0: reg 0x10: [mem 0xffffc000-0xffffffff]
[    0.517607] pci 0001:01:00.0: reg 0x14: [mem 0xffc00000-0xffffffff]
[    0.517614] pci 0001:01:00.0: reg 0x18: [mem 0xffff0000-0xffffffff]
[    0.517676] pci 0001:01:00.0: supports D1
[    0.517678] pci 0001:01:00.0: PME# supported from D0 D1 D3hot D3cold
[    0.529572] pci_bus 0001:01: busn_res: [bus 01-ff] end is updated to 01
[    0.529579] pci 0001:00:00.0: BAR 8: assigned [mem 0x1f00000000-0x1f005fffff]
[    0.529582] pci 0001:01:00.0: BAR 1: assigned [mem 0x1f00000000-0x1f003fffff]
[    0.529588] pci 0001:01:00.0: BAR 2: assigned [mem 0x1f00400000-0x1f0040ffff]
[    0.529593] pci 0001:01:00.0: BAR 0: assigned [mem 0x1f00410000-0x1f00413fff]
[    0.529598] pci 0001:00:00.0: PCI bridge to [bus 01]
[    0.529601] pci 0001:00:00.0:   bridge window [mem 0x1f00000000-0x1f005fffff]
[    0.529605] pci 0001:00:00.0: Max Payload Size set to  256/ 512 (was  128), Max Read Rq  512
[    0.529613] pci 0001:01:00.0: Max Payload Size set to  256/ 256 (was  128), Max Read Rq  512
[    0.529644] pcieport 0001:00:00.0: enabling device (0000 -> 0002)
[    0.529666] pcieport 0001:00:00.0: PME: Signaling with IRQ 48
[    0.529715] pcieport 0001:00:00.0: AER: enabled with IRQ 48

Unplugging the 2nd Radxa HAT, I get the dual 2.5G controllers and can see an onboard NVMe SSD, but I still don’t see any HAT beyond the connector. I’ve tried two more Waveshare HATs and there’s never any PWR LED that lights up on any of these HATs

Mitchell · March 4, 2025, 11:43am

Hi @geerlingguy

This is the Raspberry Pi system I use：https://downloads.raspberrypi.com/raspios_arm64/images/raspios_arm64-2024-11-19/2024-11-19-raspios-bookworm-arm64.img.xz

Here is the configuration of my eeprom:

[图片]

geerlingguy · March 5, 2025, 8:37pm

Thanks! I’m using https://downloads.raspberrypi.com/raspios_lite_arm64/images/raspios_lite_arm64-2024-11-19/2024-11-19-raspios-bookworm-arm64-lite.img.xz (so the lite version instead of the desktop version), with sudo apt update && sudo apt -y upgrade then a reboot to make sure I’m on the latest versions of everything.

Here are all the stats for what you’ve listed:

pi@pi5-router:~ $ vcgencmd version
2024/12/07 12:42:23 
Copyright (c) 2012 Broadcom
version 3858f977 (release) (embedded)
pi@pi5-router:~ $ sudo rpi-eeprom-update
*** UPDATE AVAILABLE ***

Run "sudo rpi-eeprom-update -a" to install this update now.

To configure the bootloader update policy run "sudo raspi-config"

BOOTLOADER: update available
   CURRENT: Sat  7 Dec 12:42:23 UTC 2024 (1733575343)
    LATEST: Wed 12 Feb 10:51:52 UTC 2025 (1739357512)
   RELEASE: default (/usr/lib/firmware/raspberrypi/bootloader-2712/default)
            Use raspi-config to change the release.
pi@pi5-router:~ $ sudo rpi-eeprom-config
[all]
BOOT_UART=1
WAKE_ON_GPIO=0
POWER_OFF_ON_HALT=1
BOOT_ORDER=0xf416
PCIE_PROBE=1
#SDRAM_BANKLOW=1
pi@pi5-router:~ $ uname -a
Linux pi5-router 6.6.74+rpt-rpi-2712 #1 SMP PREEMPT Debian 1:6.6.74-1+rpt1 (2025-01-27) aarch64 GNU/Linux

I would be surprised if the WAKE_ON_GPIO and POWER_OFF_ON_HALT options did anything.

Have you customized /boot/firmware/config.txt or /boot/firmware/cmdline.txt in any way?

geerlingguy · March 5, 2025, 9:10pm

I’ve also attempted to use a few other standard PCI Express cards in my uPCIty Lite adapter, which has a separate 12V power input.

The 12V LED lights up, but not the PWR LED indicating it’s getting power from the FPC

5V is still showing on the proper pins, so I’m not sure what’s the deal.

Do you have any other HATs you’ve tested successfully on the external connector besides another Dual 2.5G HAT? I can maybe order one so we can have an exact like-for-like system.