Cpuidle enable or disable on Orion O6

  • Environment

   Debian12
  • Cpuidle power states

# Power states State Description
1 RUN Working CPU is in running state
2 STANDBY WFI CPU enters WFI, clock is in gating state
3 OFF Poweroff CPU is in off state, no clock and power
  • DTS CONFIG

dete cpu-idle-states in cpuX node:
CPU0: cpu0@0 {
…
        cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
}; 

  • Control CPU idle function via cmdline in grub

  1. disable cpuidle: cpuidle.off=1
  2. enable cpuidle: cpuidle.off=0 or delete it

  • User Space Interface

#/sys/devices/system/cpu/cpuX/cpuidle/stateX

root@cix-localhost:/sys/devices/system/cpu/cpu0/cpuidle/state0# ls

above  default_status  disable  name   rejected   time

below  desc            latency  power  residency  usage

- name, name;

- desc, more detailed description;

- disable, reading and setting of cpuidle enable state;

- latency, the time required to exit this state, in us;

- power, power consumption in this state, in mW;

- time, total time spent in this state, in us

- usage, number of times this state was entered.

#/sys/devices/system/cpu/cpuidle# ls

available_governors  current_driver  current_governor  current_governor_ro
1 Like

@hong.guo Do you mean enable? Can you clarify this?

I have some dumb questions:

  • cpu10 and cpu11 never gets idle state ?
/sys/devices/system/cpu/cpu0/cpuidle/:
driver  state0  state1  state2

/sys/devices/system/cpu/cpu1/cpuidle/:
driver  state0  state1  state2

/sys/devices/system/cpu/cpu2/cpuidle/:
driver  state0  state1  state2

/sys/devices/system/cpu/cpu3/cpuidle/:
driver  state0  state1  state2

/sys/devices/system/cpu/cpu4/cpuidle/:
driver  state0  state1  state2

/sys/devices/system/cpu/cpu5/cpuidle/:
driver  state0  state1  state2

/sys/devices/system/cpu/cpu6/cpuidle/:
driver  state0  state1  state2

/sys/devices/system/cpu/cpu7/cpuidle/:
driver  state0  state1  state2

/sys/devices/system/cpu/cpu8/cpuidle/:
driver  state0  state1  state2

/sys/devices/system/cpu/cpu9/cpuidle/:
driver  state0  state1  state2

DTS

	cpu0@0 {
		compatible = "arm,armv8";
		reg = <0x00 0x00>;
		device_type = "cpu";
		enable-method = "psci";
		clocks = <0x0e 0x02>;
		#cooling-cells = <0x02>;
		cpu-idle-states = <0x0f 0x10>;
		capacity-dmips-mhz = <0x193>;
		phandle = <0x02>;
	};

	cpu1@100 {
		compatible = "arm,armv8";
		reg = <0x00 0x100>;
		device_type = "cpu";
		enable-method = "psci";
		clocks = <0x0e 0x02>;
		#cooling-cells = <0x02>;
		cpu-idle-states = <0x0f 0x10>;
		capacity-dmips-mhz = <0x193>;
		phandle = <0x03>;
	};

	cpu2@200 {
		compatible = "arm,armv8";
		reg = <0x00 0x200>;
		device_type = "cpu";
		enable-method = "psci";
		clocks = <0x0e 0x02>;
		#cooling-cells = <0x02>;
		cpu-idle-states = <0x0f 0x10>;
		capacity-dmips-mhz = <0x193>;
		phandle = <0x04>;
	};

	cpu3@300 {
		compatible = "arm,armv8";
		reg = <0x00 0x300>;
		device_type = "cpu";
		enable-method = "psci";
		clocks = <0x0e 0x02>;
		#cooling-cells = <0x02>;
		cpu-idle-states = <0x0f 0x10>;
		capacity-dmips-mhz = <0x193>;
		phandle = <0x05>;
	};

	cpu4@400 {
		compatible = "arm,armv8";
		reg = <0x00 0x400>;
		device_type = "cpu";
		enable-method = "psci";
		clocks = <0x0e 0x05>;
		#cooling-cells = <0x02>;
		cpu-idle-states = <0x11 0x10>;
		capacity-dmips-mhz = <0x400>;
		phandle = <0x06>;
	};

	cpu5@500 {
		compatible = "arm,armv8";
		reg = <0x00 0x500>;
		device_type = "cpu";
		enable-method = "psci";
		clocks = <0x0e 0x05>;
		#cooling-cells = <0x02>;
		cpu-idle-states = <0x11 0x10>;
		capacity-dmips-mhz = <0x400>;
		phandle = <0x07>;
	};

	cpu6@600 {
		compatible = "arm,armv8";
		reg = <0x00 0x600>;
		device_type = "cpu";
		enable-method = "psci";
		clocks = <0x0e 0x06>;
		#cooling-cells = <0x02>;
		cpu-idle-states = <0x11 0x10>;
		capacity-dmips-mhz = <0x400>;
		phandle = <0x08>;
	};

	cpu7@700 {
		compatible = "arm,armv8";
		reg = <0x00 0x700>;
		device_type = "cpu";
		enable-method = "psci";
		clocks = <0x0e 0x06>;
		#cooling-cells = <0x02>;
		cpu-idle-states = <0x11 0x10>;
		capacity-dmips-mhz = <0x400>;
		phandle = <0x09>;
	};

	cpu8@800 {
		compatible = "arm,armv8";
		reg = <0x00 0x800>;
		device_type = "cpu";
		enable-method = "psci";
		clocks = <0x0e 0x03>;
		#cooling-cells = <0x02>;
		cpu-idle-states = <0x11 0x10>;
		capacity-dmips-mhz = <0x400>;
		phandle = <0x0a>;
	};

	cpu9@900 {
		compatible = "arm,armv8";
		reg = <0x00 0x900>;
		device_type = "cpu";
		enable-method = "psci";
		clocks = <0x0e 0x03>;
		#cooling-cells = <0x02>;
		cpu-idle-states = <0x11 0x10>;
		capacity-dmips-mhz = <0x400>;
		phandle = <0x0b>;
	};

	cpu10@a00 {
		compatible = "arm,armv8";
		reg = <0x00 0xa00>;
		device_type = "cpu";
		enable-method = "psci";
		clocks = <0x0e 0x04>;
		#cooling-cells = <0x02>;
		cpu-idle-states = <0x11 0x10>;
		capacity-dmips-mhz = <0x400>;
		phandle = <0x0c>;
	};

	cpu11@b00 {
		compatible = "arm,armv8";
		reg = <0x00 0xb00>;
		device_type = "cpu";
		enable-method = "psci";
		clocks = <0x0e 0x04>;
		#cooling-cells = <0x02>;
		cpu-idle-states = <0x11 0x10>;
		capacity-dmips-mhz = <0x400>;
		phandle = <0x0d>;
	};
};

I want to write a small cpufreq + cpu temp monitor , so a little understanding would be helpful.

Sorry,Updated already!

plese help to :

/# cat /sys/devices/system/cpu/online
0-11
this is our platform:
/# ls /sys/devices/system/cpu/cpu*/cpuidle
/sys/devices/system/cpu/cpu0/cpuidle:
driver state0 state1 state2

/sys/devices/system/cpu/cpu10/cpuidle:
driver state0 state1 state2

/sys/devices/system/cpu/cpu11/cpuidle:
driver state0 state1 state2

/sys/devices/system/cpu/cpu1/cpuidle:
driver state0 state1 state2

/sys/devices/system/cpu/cpu2/cpuidle:
driver state0 state1 state2

/sys/devices/system/cpu/cpu3/cpuidle:
driver state0 state1 state2

/sys/devices/system/cpu/cpu4/cpuidle:
driver state0 state1 state2

/sys/devices/system/cpu/cpu5/cpuidle:
driver state0 state1 state2

/sys/devices/system/cpu/cpu6/cpuidle:
driver state0 state1 state2

/sys/devices/system/cpu/cpu7/cpuidle:
driver state0 state1 state2

/sys/devices/system/cpu/cpu8/cpuidle:
driver state0 state1 state2

/sys/devices/system/cpu/cpu9/cpuidle:
driver state0 state1 state2