CM3 V1.3 pinout seems wrong

In V1.3 schematic, connector J69 pin 37 is labelled as 4G_DISABLE which can be used for GPIO but it’s SARADC_IN3 in pinout page and excel sheet.
Could anyone let me know which one is correct? I would use this pin for GPIO if the schematic is correct.

I also would like to know the answer. Is there any update on this. Nothing has changed.

Also, for compatibility with almost all your boards, why was pin 26 on the IO board 40 pin header not set to SPI_CS1. Instead it is set as 4G_DISABLE or SARADC_IN3 (depending on where you look).


This really messes things up setting it to pin 36. One hopes there is a valid reason for this setback.