Here is my uboot patch to break rockchipās block policy for rk3582: https://paste.armbian.com/uqibeqomih
I will only disable broken ip cores.
Here is my kernel log: https://paste.armbian.com/zifeqiqobu
I am lucky to have all 8 good cpu cores and 2 rkvdec and 2 rkvenc cores.
My gpu has broken cores, if I enable it, desktop is not rendered good under panfork driver. So I will only enable gpu if all 4 cores are good.
From TRM part1 page 367:
The features of VDPU381 decoder are listed as follows: MMU embedded with MMU interrupt support Dual-core decoding support H.265 HEVC/MVC Main10 Profile [email protected] up to 7680x4320@60fps, max solution
up to 65472x65472 H.264 AVC/MVC Main10 Profile yuv400/yuv420/yuv422/@L6.0 up to 7680x4320@30fps,
max solution up to 65520x65520 VP9 Profile0/2 [email protected] up to 7680x4320@60fps, max solution up to 65472x65472 AVS2 Profile0/2 [email protected] up to 7680x4320@60fps, max solution up to
16383x16383
They should swap the H264 and VP9. According to actual tests, only when AFBC is enabled, the H264 decoder can handle up to 8K60, while the VP9 decoder can only handle up to 8K30. So the TRM is not fully trust worthy.
Yeah, 2 cores of vdpu381 can do 8k@60 with afbc, single core vdpu381 can at max can to 8k@30 when pushed, 4k@60 nominally.
So vp9 core of vdpu381 can do 8k@30 cos its single core
but single core av1 vdpu981 can only 4k@60 may be 8k@12~15~18 when pushed.
So single and dual core of the preformance also depends on the core type.
What annoys me is that rockchip is always writing this wrong.
Therefore my understanding vdpu381 is
2xh264, 2xhevc, 1xvp9 decoders,but i might be also wrong⦠because it does not make sense to have cores per format from design pov soā¦
I sort of get the Rockchip RK3582 Rock5C lite as a headless (No GPU) that those A76 cores are a sweet spot for many ML framewroks that have diminishing returns above 2 thread.
Even some DSP works well on a single big core as the process is generally serial and doesnāt parralel well.
It is a bit of a curveball though.
The $25 1gb Rock5C is a great price, but wondering if a Zero format would of even been better and lower cost.
Is this possible to get two m.2 slots and some kind of switch between 4x and 2x+2x?
Two m.2 are great great for some cases but it can be simply (and rather cheap) done via @seni board. Maybe there is easy way to include such feature at hardware level, as far as I remember vim3 muxed between usb3 and pcie2.0. Even some hard jumpers would be great.
I think the PCIe Lanes bifurcation was done by hardwire⦠will confirm you after I tested it:wink:
and may be in a new thread as this one is focused on Rock 5C
Sure,
I think that this should be possible, I just noticed photos on different thread of R5+, so I assume that design is closed for now, but we may have something like this in 5D?
Where can we buy the FPC to M.2 connector? Allnet China donāt have any, searching on Aliexpress for it was⦠frustrating, to say the least. And there is no link for it on the Radxa site.
On the 5C product page it has 2 pictures of a āPCIe to M.2 M Key HATā, but no link, and it looks like it connects to the GPIO. Where can we buy that from?
or is it an FPC (Flexible Printed Circuit) PCIe socket that can connect to a RaspberryPi-5-like M.2 HAT?
If so, could we conceivably use the same sort of PCIe to M.2 M key HAT that are available for the Raspberry Pi 5?