25MHz 3.3V clk from Pi-S Core?

#1

Hi @RadxaYuntian,

I would like to run USB hub + ETH bridge chip LAN9513 with 25MHz from RK3308 (Pi-S Core), to avoid unneccessary noise interferences created by multiple independently-running oscillators (and cost too). The LAN9513 chip runs at 3.3V logic.

Clk summary shows there are available 25MHz clock signals:

SD card SDMMC_CLK, presumably clocked from sdmmc_sample clk

Eth MAC_CLK presumably clocked from clk_mac_rmii_sel clk. Actually this signal is used for clocking RTL8201F on Pi-S. Please does it run at 25MHz?

pll_dpll                          1        1        0  1300000000          0     0  50000         Y
   dpll                           5        6        0  1300000000          0     0  50000         Y
      clk_sdmmc_div               1        1        0    50000000          0     0  50000         Y
         clk_sdmmc                1        1        0    50000000          0     0  50000         Y
            sdmmc_sample          0        0        0    25000000          0     0  50000         Y
            sdmmc_drv             0        0        0    25000000          0    90  50000         Y
      clk_wifi_dpll               0        0        0  1300000000          0     0  50000         N
         clk_wifi_src             0        0        0    43333334          0     0  50000         N
            clk_wifi              0        0        0    43333334          0     0  50000         N
      clk_usbphy_ref_src          0        0        0    26000000          0     0  50000         N
      clk_owire                   0        0        0   108333334          0     0  50000         N
      clk_mac_src                 1        1        0    50000000          0     0  50000         Y
         clk_mac                  4        4        0    50000000          0     0  50000         Y
            clk_mac_rx_tx         3        3        0    50000000          0     0  50000         Y
               clk_mac_rx_tx_div20       0        0        0     2500000          0     0  50000         Y
               clk_mac_rx_tx_div2       1        1        0    25000000          0     0  50000         Y
                  clk_mac_rmii_sel       1        1        0    25000000          0     0  50000         Y
            clk_mac_ref           1        1        0    50000000          0     0  50000         Y

Please would any of these be usable for the 3.3V 25MHz clk for the LAN9513?

If the SDMMC_CLK were usable, would the signal be able to feed both the TF card interface (to keep its functionality, as backup for the planned eMMC onboard the Pi-S Core) and the LAN9513 chip at the same time? I could not find any electrical specs of that output. I would prefer the SDMMC signal as the MAC_CLK pin conflicts with PDM/I2S interfaces which I would like to have available.

Thanks a lot.

Pavel.

#2

I’m no hardware engineer, but we used LAN9514 on our CM3S IO board: https://dl.radxa.com/cm3s/io_board/radxa_cm3s_io_board_v1510_schematic_20230327.pdf

From the schematic I don’t think we connected it to any external clock. Maybe that’s something possible for LAN9513 as well?

#3

IIUC your IO board has 25MHz oscillator Y1 for LAN9514. That’s what I would like to avoid, by using a 25MHz clock signal from RK3308, synchronous to all the other clocks onboard (apart of the separate 24MHz crystal for the built-in wifi which cannot be disabled).