I’ve brought up my attempts at this in discord, and I guess no one has tried it as I’ve gotten no responses for me to progress on, so I’ll see what thoughts can be offered here…
My intent was to make use of JTAG so I could work through issues that aren’t brought up in logs, but in order to do that, it appears I need to free up UART2 GPIO0_B{5,6}
.
So I opted to go with UART7 GPIO3_B{1,2}
, since they were nicely placed, but I didn’t get ANY output from there.
I had spent days trying various things, but getting nowhere, so I tried dumbing it down as much as I could for myself and simply went with UART2’s GPIO1_B{4,5}
mux.
Again, I got nothing from there, but putting it back on the OG pins, I was getting FULL output (as opposed to when I was on UART7 where the output would stop at out
on UART2{1_B4,5}, making me think it handed off to u-boot from TPL/SPL as to be expected with the remaining output starting with <debug_uart>
, but never did get it on those respective port/pins.).
The most dumbed-down changes I made was altering /<pathTo>/u-boot/arch/arm/dts/rk3588-rock-5b.dts
uart2m0_xfer
to uart2m2_xfer
, and setting CONFIG_ROCKCHIP_EXTERNAL_TPL=y
, which for some reason is never set in mainline uboot.
And this was even after git cleaning/resetting to start fresh, after changes I had been making trying to get UART7 to work.
I even used dtc
to disassemble the dtb so I can see if anything else was enabled using the same pins as UART, but everything else like i2c
were disabled.