I2s-out overlay to enable i2s0

And 8 channels armbian 5.9

https://raw.githubusercontent.com/eragefe/Rockpi-S/master/armbian-5.9.y-kernel-8ch.dts

Welcome to Armbian 20.11 Focal with Linux 5.9.10-rockchip64

System load: 10% Up time: 0 min
Memory usage: 33% of 213M IP: 192.168.1.138
CPU temp: 35°C Usage of /: 6% of 15G

Last login: Thu Dec 3 14:36:05 2020 from 192.168.1.100
root@rockpi-s:~# aplay -l
**** List of PLAYBACK Hardware Devices ****
card 0: SimpleDAC [SimpleDAC], device 0: ff300000.i2s-pcm5102a-hifi pcm5102a-hifi-0 [ff300000.i2s-pcm5102a-hifi pcm5102a-hifi-0]
Subdevices: 1/1
Subdevice #0: subdevice #0
card 1: rockchiprk3308a [rockchip,rk3308-acodec], device 0: ff320000.i2s-rk3308-hifi rk3308-hifi-0 [ff320000.i2s-rk3308-hifi rk3308-hifi-0]
Subdevices: 1/1
Subdevice #0: subdevice #0
root@rockpi-s:~# speaker-test -c8 -D plughw:0

speaker-test 1.2.2

Playback device is plughw:0
Stream parameters are 48000Hz, S16_LE, 8 channels
Using 16 octaves of pink noise
Rate set to 48000Hz (requested 48000Hz)
Buffer size range from 128 to 131072
Period size range from 64 to 65536
Using max buffer size 131072
Periods = 4
was set period_size = 32768
was set buffer_size = 131072
0 - Front Left
4 - Center
1 - Front Right
7 - Side Right
3 - Rear Right
2 - Rear Left
6 - Side Left
5 - LFE
Time per period = 19.191959
0 - Front Left
4 - Center
1 - Front Right
7 - Side Right
3 - Rear Right
2 - Rear Left
6 - Side Left
5 - LFE
Time per period = 21.844418
0 - Front Left
4 - Center
1 - Front Right
7 - Side Right
3 - Rear Right
2 - Rear Left
^CWrite error: -4,Interrupted system call
xrun_recovery failed: -4,Interrupted system call
Transfer failed: Interrupted system call
root@rockpi-s:~#

1 Like

Hi eragefe,

Back in time I tried your overlay with the official Radxa image, it was working fine.

Yesterday I tried again with the latest image, I updated the system and then tried to load your dtbo, but it doesn’t work, I don’t see any card listed with aplay -l

What can I do to make it working?

Please forget what I wrote, it works fine (I had an issue with group permissions)

the card still has the old name “My_card”, it’s not aligned with the new source file “is2out”

could you please update the .dtbo, or explain how to generate the .dtbo from the .dts, within the Radxa image?

If you want to compile myfile.dts
try
dtc -@ -H epapr -O dtb -o myfile.dtbo -Wno-unit_address_vs_reg myfile.dts

Perfect, many thanks!

Hey @peterk Which kernel were you using here? Was it an Armbian image?

No, the raxda verion. It is 4.4.157. The dt changes may also work with armbian.

Is there a MS Windows 10 64bit version of this i2S0 overlay to work with Visual Studio?

@eragefe & @peterk i am currently working with the i2S and your overlays to enable it are perfect thanks! So far i am able to read a 4ch I2S ADC. I am working on the DAC side now. We need to make sure the ADC and DAC are phase synchronous so the MCLK is important. The overlay doesnt output a CLK on the MCLK line (pin 7 I think on the PIs) I want to be able to scale it (256 * LRCLK etc). I can see in the reference manual all the registers to set up the clock and they seem ok when i read it with busy box devmem. My question is have you got the MCLK working with the I2S in master mode? and can you explain how to enable it in the device tree overlays? Interestingly the dmic overlay enables the MCLK so there must be a way? Thanks, Josh

@10josh29
Right,I have also noticed that there is no output at MCKL. I do not try to activate it, because I do not need it. Have a ADAU1467 connected to i2s-tdm with 8ch. The ADAU has 8 ARC. Connected to the ADAU are 4 pcm5102a and 1 pcm1802.
Using the PIS only as communication frontend for the ADAU to feed the audio streams to the ADAU.

No I tried months ago but it was only a very few tries since I dont need it in my case.
I use PIS as I2S slave with an external clock that serves as master clock in my application.
I have sent a question in this forum at that time with NO answer and let it go.
But you say that “the dmic overlay enables the MCLK” Is it something you have confirmed? and in that case can you post that overlay so I can see it. Maybe I can find out things.

Thank you for your replies! I hope you dont mind me tagging both of you at the same time, more minds the better! So far i have an ADAU1978 and a CS4344 DAC connected to the I2C and I2S lines (CODECs are quite hard to buy at the moment!) I can record 4 channel audio from the ADC as the ADAU can use the LRCLK for the PLL. The DAC however needs a MCLK at a multiple of the LRCLK frequency. @eragefe to answer your question i have scoped the MCLK, LRCLK and BCLK and seen that the DMIC overlay (pasted below) does toggle the MCLK pin but none of the others, this might be because the same pin is used for PCM CLK? It is interesting how you have used the MCLK as an input, is that in your existing overlay and how do you use it? I saw your question. Sadly as im mostly a hardware background i know very little about writing and reading these device trees. My application is quite unique. Im using the ADCs to measure magnetic fields in multiple axis to perform various DSP functions. The DACs can inject signals into the antennas so therefore need to be synchronised. I couldnt upload the overlay however it can be sound in the dtb/overlays folder within the boot directory of the kernal. If you could take a look and see what needs to change to enable that output that would be great. The low level registers in the CPU all seem to bet set up correctly.
Thanks
Josh

/dts-v1/;

/ {
model = “Radxa ROCK Pi S”;
compatible = “radxa,rockpis-rk3308\0rockchip,rk3308”;

fragment@0 {
	target-path = [ 2f 00 ];

	__overlay__ {

		pdm-i2s-dais {
			status = "okay";
			#sound-dai-cells = < 0x00 >;
			compatible = "rockchip,rk3308-multi-dais\0rockchip,multi-dais";
			dais = < 0xffffffff 0xffffffff >;
			capture,channel-mapping = < 0x08 0x00 >;
			playback,channel-mapping = < 0x00 0x08 >;
			bitclock-inversion = < 0x00 0x00 >;
			phandle = < 0x01 >;
		};

		vad-sound {
			status = "okay";
			compatible = "rockchip,multicodecs-card";
			rockchip,card-name = "rockchip,rk3308-vad";
			rockchip,cpu = < 0x01 >;
			rockchip,codec = < 0xffffffff 0xffffffff >;
		};
	};
};

fragment@1 {
	target = < 0xffffffff >;

	__overlay__ {
		status = "disabled";
	};
};

fragment@2 {
	target = < 0xffffffff >;

	__overlay__ {
		status = "okay";
		rockchip,audio-src = < 0xffffffff >;
		rockchip,det-channel = < 0x00 >;
		rockchip,mode = < 0x01 >;
		rockchip,buffer-time-ms = < 0xc8 >;
		#sound-dai-cells = < 0x00 >;
	};
};

fragment@3 {
	target = < 0xffffffff >;

	__overlay__ {
		status = "okay";
		#sound-dai-cells = < 0x00 >;
		rockchip,no-dmaengine;
		pinctrl-names = "default";
		pinctrl-0 = < 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff >;
	};
};

fragment@4 {
	target = < 0xffffffff >;

	__overlay__ {
		rockchip,no-dmaengine;
	};
};

__symbols__ {
	pdm_i2s_dais = "/fragment@0/__overlay__/pdm-i2s-dais";
};

__fixups__ {
	pdm_8ch = "/fragment@0/__overlay__/pdm-i2s-dais:dais:0\0/fragment@2/__overlay__:rockchip,audio-src:0\0/fragment@3:target:0";
	i2s_8ch_2 = "/fragment@0/__overlay__/pdm-i2s-dais:dais:4\0/fragment@4:target:0";
	acodec = "/fragment@0/__overlay__/vad-sound:rockchip,codec:0";
	vad = "/fragment@0/__overlay__/vad-sound:rockchip,codec:4\0/fragment@2:target:0";
	acodec_sound = "/fragment@1:target:0";
	pdm_m2_clk = "/fragment@3/__overlay__:pinctrl-0:0";
	pdm_m2_clkm = "/fragment@3/__overlay__:pinctrl-0:4";
	pdm_m2_sdi0 = "/fragment@3/__overlay__:pinctrl-0:8";
	pdm_m2_sdi1 = "/fragment@3/__overlay__:pinctrl-0:12";
	pdm_m2_sdi2 = "/fragment@3/__overlay__:pinctrl-0:16";
	pdm_m2_sdi3 = "/fragment@3/__overlay__:pinctrl-0:20";
};

__local_fixups__ {

	fragment@0 {

		__overlay__ {

			vad-sound {
				rockchip,cpu = < 0x00 >;
			};
		};
	};
};

};

As far as I understand is that pdm and i2s_8_ch mclk share the same pin.
I think, that is not a issue we can solve with overlays.
That is somewhat related to the rockchip-i2c-tdm.c driver. It seems to me that they have forgot to set the mux for this pin right.
You may look, if rockship have an updated version of this driver.

1 Like

Hi, @eragefe!
I need to “lift to the air” 8 ch (may be 2ch) i2s OUT on RV1106 chip (Luckfox-Pico-Max board).
I’m planning to use it in slave mode with external clock (from DAC board).
In addition I need two master-clock networks - 44,1 and 48 (45*** MHz and 49*** MHz).
So a need one additional pin for choosing the master-clock network - switcj between.

Can you advice me to make “right” DTS for this case?

Has anyone connected INMP441 to radxa rock 5c? Share your experience.

For those who need MCLK:

Find i2s@ff300000 edit: Remove last 0x4a from pinctrl-0 string:
pinctrl-0 = <0x3e 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49>;
… and:

        dummy_tdm_codec: dummy-codec {
                status = "okay";
                compatible = "rockchip,dummy-codec";
                #sound-dai-cells = < 0 >;
                clocks = <&cru SCLK_I2S0_8CH_TX_OUT>; //or <0x02 0x4d>
                clock-names = "mclk";
                pinctrl-names = "default";
                pinctrl-0 = <&i2s_8ch_0_mclk>; //or <0x4a>
                };

MCLK is out!